Searched refs:mvns (Results 1 – 25 of 52) sorted by relevance
123
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb/ |
D | mvn.ll | 7 ; CHECK-NEXT: mvns r1, r1 20 ; CHECK-NEXT: mvns r3, r3 22 ; CHECK-NEXT: mvns r0, r2 39 ; CHECK-NEXT: mvns r2, r2 70 ; CHECK-NEXT: mvns r4, r4 72 ; CHECK-NEXT: mvns r3, r3 102 ; CHECK-NEXT: mvns r1, r1 115 ; CHECK-NEXT: mvns r3, r3 117 ; CHECK-NEXT: mvns r0, r2 134 ; CHECK-NEXT: mvns r2, r2 [all …]
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D | constants.ll | 24 ; CHECK-T1: mvns r5, r4
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D | long.ll | 44 ; CHECK: mvns r0, r0
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/external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/ |
D | thumb2-mvn2.ll | 5 ; CHECK: mvns r0, r0 12 ; CHECK: mvns r0, r0
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/external/llvm/test/CodeGen/Thumb2/ |
D | thumb2-mvn2.ll | 5 ; CHECK: mvns r0, r0 12 ; CHECK: mvns r0, r0
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/ |
D | thumb2-mvn2.ll | 5 ; CHECK: mvns r0, r0 12 ; CHECK: mvns r0, r0
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D | ifcvt-rescan-diamonds.ll | 26 ; CHECK-NEXT: mvns
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | arm_instructions.s | 54 @ CHECK: mvns r1, r2 @ encoding: [0x02,0x10,0xf0,0xe1] 55 mvns r1,r2
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D | basic-thumb-instructions.s | 384 mvns r6, r3 386 @ CHECK: mvns r6, r3 @ encoding: [0xde,0x43]
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D | basic-arm-instructions.s | 991 mvns r3, #7 998 @ CHECK: mvns r3, #7 @ encoding: [0x07,0x30,0xf0,0xe3] 1007 mvns r2, r3 1017 @ CHECK: mvns r2, r3 @ encoding: [0x03,0x20,0xf0,0xe1] 1031 mvns r5, r6, lsr r7 1036 @ CHECK: mvns r5, r6, lsr r7 @ encoding: [0x36,0x57,0xf0,0xe1]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | arm_instructions.s | 61 @ CHECK: mvns r1, r2 @ encoding: [0x02,0x10,0xf0,0xe1] 62 mvns r1,r2
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D | basic-thumb-instructions.s | 435 mvns r6, r3 437 @ CHECK: mvns r6, r3 @ encoding: [0xde,0x43]
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/external/llvm/test/MC/ARM/ |
D | arm_instructions.s | 61 @ CHECK: mvns r1, r2 @ encoding: [0x02,0x10,0xf0,0xe1] 62 mvns r1,r2
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D | basic-thumb-instructions.s | 435 mvns r6, r3 437 @ CHECK: mvns r6, r3 @ encoding: [0xde,0x43]
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/external/capstone/suite/MC/ARM/ |
D | arm_instructions.s.cs | 17 0x02,0x10,0xf0,0xe1 = mvns r1, r2
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D | basic-thumb-instructions.s.cs | 87 0xde,0x43 = mvns r6, r3
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D | basic-arm-instructions.s.cs | 423 0x07,0x30,0xf0,0xe3 = mvns r3, #7 427 0x03,0x20,0xf0,0xe1 = mvns r2, r3 436 0x36,0x57,0xf0,0xe1 = mvns r5, r6, lsr r7
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D | basic-thumb2-instructions.s.cs | 514 0x7f,0xf0,0x15,0x08 = mvns r8, #21 516 0x7f,0xf0,0x7f,0x70 = mvns r0, #66846720 522 0xda,0x43 = mvns r2, r3
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | cmn.ll | 20 ; T1-NEXT: mvns r3, r0
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D | minsize-imms.ll | 17 ; CHECK-V6M: mvns r0, [[TMP]] @ encoding: [0xc0,0x43]
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/external/llvm/test/CodeGen/ARM/ |
D | minsize-imms.ll | 17 ; CHECK-V6M: mvns r0, [[TMP]] @ encoding: [0xc0,0x43]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
D | thumb1.txt | 306 # CHECK: mvns r6, r3
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | thumb1.txt | 289 # CHECK: mvns r6, r3
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/external/llvm/test/MC/Disassembler/ARM/ |
D | thumb1.txt | 306 # CHECK: mvns r6, r3
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/external/vixl/test/aarch32/ |
D | test-assembler-cond-rd-operand-rn-t32.cc | 57 M(mvns) \
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