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Searched refs:ntid (Results 1 – 24 of 24) sorted by relevance

/external/swiftshader/third_party/LLVM/test/CodeGen/PTX/
Dintrinsic.ll32 ; CHECK: mov.u32 %ret0, %ntid.x;
34 %x = call i32 @llvm.ptx.read.ntid.x()
39 ; CHECK: mov.u32 %ret0, %ntid.y;
41 %x = call i32 @llvm.ptx.read.ntid.y()
46 ; CHECK: mov.u32 %ret0, %ntid.z;
48 %x = call i32 @llvm.ptx.read.ntid.z()
53 ; CHECK: mov.u32 %ret0, %ntid.w;
55 %x = call i32 @llvm.ptx.read.ntid.w()
245 declare i32 @llvm.ptx.read.ntid.x()
246 declare i32 @llvm.ptx.read.ntid.y()
[all …]
/external/llvm/test/CodeGen/NVPTX/
Dintrinsic-old.ll41 ; CHECK: mov.u32 %r{{[0-9]+}}, %ntid.x;
42 ; RANGE: call i32 @llvm.nvvm.read.ptx.sreg.ntid.x(), !range ![[BLK_SIZE_XY:[0-9]+]]
44 %x = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
49 ; CHECK: mov.u32 %r{{[0-9]+}}, %ntid.y;
50 ; RANGE: call i32 @llvm.nvvm.read.ptx.sreg.ntid.y(), !range ![[BLK_SIZE_XY]]
52 %x = call i32 @llvm.nvvm.read.ptx.sreg.ntid.y()
57 ; CHECK: mov.u32 %r{{[0-9]+}}, %ntid.z;
58 ; RANGE: call i32 @llvm.nvvm.read.ptx.sreg.ntid.z(), !range ![[BLK_SIZE_Z:[0-9]+]]
60 %x = call i32 @llvm.nvvm.read.ptx.sreg.ntid.z()
65 ; CHECK: mov.u32 %r{{[0-9]+}}, %ntid.w;
[all …]
Dbug22322.ll14 %1 = tail call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
43 declare i32 @llvm.nvvm.read.ptx.sreg.ntid.x() #1
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/NVPTX/
Dintrinsic-old.ll41 ; CHECK: mov.u32 %r{{[0-9]+}}, %ntid.x;
42 ; RANGE: call i32 @llvm.nvvm.read.ptx.sreg.ntid.x(), !range ![[BLK_SIZE_XY:[0-9]+]]
44 %x = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
49 ; CHECK: mov.u32 %r{{[0-9]+}}, %ntid.y;
50 ; RANGE: call i32 @llvm.nvvm.read.ptx.sreg.ntid.y(), !range ![[BLK_SIZE_XY]]
52 %x = call i32 @llvm.nvvm.read.ptx.sreg.ntid.y()
57 ; CHECK: mov.u32 %r{{[0-9]+}}, %ntid.z;
58 ; RANGE: call i32 @llvm.nvvm.read.ptx.sreg.ntid.z(), !range ![[BLK_SIZE_Z:[0-9]+]]
60 %x = call i32 @llvm.nvvm.read.ptx.sreg.ntid.z()
65 ; CHECK: mov.u32 %r{{[0-9]+}}, %ntid.w;
[all …]
Dbug22322.ll14 %1 = tail call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
43 declare i32 @llvm.nvvm.read.ptx.sreg.ntid.x() #1
/external/swiftshader/third_party/LLVM/lib/Target/PTX/
DPTXIntrinsicInstrInfo.td39 //def PTX_READ_NTID_R64 : PTX_READ_SPECIAL_REGISTER_R64<"ntid",
41 def PTX_READ_NTID_X : PTX_READ_SPECIAL_REGISTER_R32<"ntid.x",
43 def PTX_READ_NTID_Y : PTX_READ_SPECIAL_REGISTER_R32<"ntid.y",
45 def PTX_READ_NTID_Z : PTX_READ_SPECIAL_REGISTER_R32<"ntid.z",
47 def PTX_READ_NTID_W : PTX_READ_SPECIAL_REGISTER_R32<"ntid.w",
/external/strace/
Dstrace.c1063 unsigned int ntid = 0, nerr = 0; in attach_tcb() local
1078 ++ntid; in attach_tcb()
1095 if (ntid > nerr) in attach_tcb()
1098 tcp->pid, ntid - nerr + 1); in attach_tcb()
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DNVPTXUsage.rst207 declare i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
208 declare i32 @llvm.nvvm.read.ptx.sreg.ntid.y()
209 declare i32 @llvm.nvvm.read.ptx.sreg.ntid.z()
230 ``blockDim`` ``@llvm.nvvm.read.ptx.sreg.ntid.*``
559 ``i32 @llvm.nvvm.read.ptx.sreg.ntid.{x,y,z}`` blockDim.{x,y,z}
/external/llvm/docs/
DNVPTXUsage.rst207 declare i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
208 declare i32 @llvm.nvvm.read.ptx.sreg.ntid.y()
209 declare i32 @llvm.nvvm.read.ptx.sreg.ntid.z()
230 ``blockDim`` ``@llvm.nvvm.read.ptx.sreg.ntid.*``
567 ``i32 @llvm.nvvm.read.ptx.sreg.ntid.{x,y,z}`` blockDim.{x,y,z}
/external/llvm/lib/Target/NVPTX/
DNVPTXIntrinsics.td6999 PTX_READ_SREG_R32<"ntid.x", int_nvvm_read_ptx_sreg_ntid_x>;
7001 PTX_READ_SREG_R32<"ntid.y", int_nvvm_read_ptx_sreg_ntid_y>;
7003 PTX_READ_SREG_R32<"ntid.z", int_nvvm_read_ptx_sreg_ntid_z>;
7005 PTX_READ_SREG_R32<"ntid.w", int_nvvm_read_ptx_sreg_ntid_w>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/
DNVPTXIntrinsics.td7317 PTX_READ_SREG_R32<"ntid.x", int_nvvm_read_ptx_sreg_ntid_x>;
7319 PTX_READ_SREG_R32<"ntid.y", int_nvvm_read_ptx_sreg_ntid_y>;
7321 PTX_READ_SREG_R32<"ntid.z", int_nvvm_read_ptx_sreg_ntid_z>;
7323 PTX_READ_SREG_R32<"ntid.w", int_nvvm_read_ptx_sreg_ntid_w>;
/external/swiftshader/third_party/llvm-7.0/configs/common/include/llvm/IR/
DIntrinsicEnums.inc3915 nvvm_read_ptx_sreg_ntid_w, // llvm.nvvm.read.ptx.sreg.ntid.w
3916 nvvm_read_ptx_sreg_ntid_x, // llvm.nvvm.read.ptx.sreg.ntid.x
3917 nvvm_read_ptx_sreg_ntid_y, // llvm.nvvm.read.ptx.sreg.ntid.y
3918 nvvm_read_ptx_sreg_ntid_z, // llvm.nvvm.read.ptx.sreg.ntid.z
DIntrinsicImpl.inc3941 "llvm.nvvm.read.ptx.sreg.ntid.w",
3942 "llvm.nvvm.read.ptx.sreg.ntid.x",
3943 "llvm.nvvm.read.ptx.sreg.ntid.y",
3944 "llvm.nvvm.read.ptx.sreg.ntid.z",
12819 1, // llvm.nvvm.read.ptx.sreg.ntid.w
12820 1, // llvm.nvvm.read.ptx.sreg.ntid.x
12821 1, // llvm.nvvm.read.ptx.sreg.ntid.y
12822 1, // llvm.nvvm.read.ptx.sreg.ntid.z
/external/swiftshader/third_party/llvm-7.0/llvm/test/DebugInfo/NVPTX/
Ddebug-info.ll30 ; CHECK: mov.u32 %r{{.+}}, %ntid.x;
68 %1 = tail call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() #3, !dbg !617, !range !661
8403 declare i32 @llvm.nvvm.read.ptx.sreg.ntid.x() #1
/external/llvm/include/llvm/IR/
DIntrinsicsNVVM.td3657 defm int_nvvm_read_ptx_sreg_ntid : PTXReadSRegIntrinsic_v4i32<"ntid">;
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/IR/
DIntrinsicsNVVM.td3683 defm int_nvvm_read_ptx_sreg_ntid : PTXReadSRegIntrinsic_v4i32<"ntid">;
/external/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/
DIntrinsics.gen3162 nvvm_read_ptx_sreg_ntid_w, // llvm.nvvm.read.ptx.sreg.ntid.w
3163 nvvm_read_ptx_sreg_ntid_x, // llvm.nvvm.read.ptx.sreg.ntid.x
3164 nvvm_read_ptx_sreg_ntid_y, // llvm.nvvm.read.ptx.sreg.ntid.y
3165 nvvm_read_ptx_sreg_ntid_z, // llvm.nvvm.read.ptx.sreg.ntid.z
9220 "llvm.nvvm.read.ptx.sreg.ntid.w",
9221 "llvm.nvvm.read.ptx.sreg.ntid.x",
9222 "llvm.nvvm.read.ptx.sreg.ntid.y",
9223 "llvm.nvvm.read.ptx.sreg.ntid.z",
17160 1, // llvm.nvvm.read.ptx.sreg.ntid.w
17161 1, // llvm.nvvm.read.ptx.sreg.ntid.x
[all …]
/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen3162 nvvm_read_ptx_sreg_ntid_w, // llvm.nvvm.read.ptx.sreg.ntid.w
3163 nvvm_read_ptx_sreg_ntid_x, // llvm.nvvm.read.ptx.sreg.ntid.x
3164 nvvm_read_ptx_sreg_ntid_y, // llvm.nvvm.read.ptx.sreg.ntid.y
3165 nvvm_read_ptx_sreg_ntid_z, // llvm.nvvm.read.ptx.sreg.ntid.z
9220 "llvm.nvvm.read.ptx.sreg.ntid.w",
9221 "llvm.nvvm.read.ptx.sreg.ntid.x",
9222 "llvm.nvvm.read.ptx.sreg.ntid.y",
9223 "llvm.nvvm.read.ptx.sreg.ntid.z",
17160 1, // llvm.nvvm.read.ptx.sreg.ntid.w
17161 1, // llvm.nvvm.read.ptx.sreg.ntid.x
[all …]
/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/
DIntrinsics.gen3162 nvvm_read_ptx_sreg_ntid_w, // llvm.nvvm.read.ptx.sreg.ntid.w
3163 nvvm_read_ptx_sreg_ntid_x, // llvm.nvvm.read.ptx.sreg.ntid.x
3164 nvvm_read_ptx_sreg_ntid_y, // llvm.nvvm.read.ptx.sreg.ntid.y
3165 nvvm_read_ptx_sreg_ntid_z, // llvm.nvvm.read.ptx.sreg.ntid.z
9220 "llvm.nvvm.read.ptx.sreg.ntid.w",
9221 "llvm.nvvm.read.ptx.sreg.ntid.x",
9222 "llvm.nvvm.read.ptx.sreg.ntid.y",
9223 "llvm.nvvm.read.ptx.sreg.ntid.z",
17160 1, // llvm.nvvm.read.ptx.sreg.ntid.w
17161 1, // llvm.nvvm.read.ptx.sreg.ntid.x
[all …]
/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen3156 nvvm_read_ptx_sreg_ntid_w, // llvm.nvvm.read.ptx.sreg.ntid.w
3157 nvvm_read_ptx_sreg_ntid_x, // llvm.nvvm.read.ptx.sreg.ntid.x
3158 nvvm_read_ptx_sreg_ntid_y, // llvm.nvvm.read.ptx.sreg.ntid.y
3159 nvvm_read_ptx_sreg_ntid_z, // llvm.nvvm.read.ptx.sreg.ntid.z
9180 "llvm.nvvm.read.ptx.sreg.ntid.w",
9181 "llvm.nvvm.read.ptx.sreg.ntid.x",
9182 "llvm.nvvm.read.ptx.sreg.ntid.y",
9183 "llvm.nvvm.read.ptx.sreg.ntid.z",
17065 1, // llvm.nvvm.read.ptx.sreg.ntid.w
17066 1, // llvm.nvvm.read.ptx.sreg.ntid.x
[all …]
/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/
DIntrinsics.gen3162 nvvm_read_ptx_sreg_ntid_w, // llvm.nvvm.read.ptx.sreg.ntid.w
3163 nvvm_read_ptx_sreg_ntid_x, // llvm.nvvm.read.ptx.sreg.ntid.x
3164 nvvm_read_ptx_sreg_ntid_y, // llvm.nvvm.read.ptx.sreg.ntid.y
3165 nvvm_read_ptx_sreg_ntid_z, // llvm.nvvm.read.ptx.sreg.ntid.z
9220 "llvm.nvvm.read.ptx.sreg.ntid.w",
9221 "llvm.nvvm.read.ptx.sreg.ntid.x",
9222 "llvm.nvvm.read.ptx.sreg.ntid.y",
9223 "llvm.nvvm.read.ptx.sreg.ntid.z",
17160 1, // llvm.nvvm.read.ptx.sreg.ntid.w
17161 1, // llvm.nvvm.read.ptx.sreg.ntid.x
[all …]
/external/cldr/tools/java/org/unicode/cldr/util/data/transforms/
Den-IPA.txt24 $x{antidiscrimination → æntidəskrɪməneʃən ; # æntɪdɪskrɪmɪneʃən
575 $x{antidepressant → æntidəprɛsənt ; # æntɪdɛprɛsænt
2269 $x{antediluvian → æntidɪluviən ; # æntɛdɪləvɑɪæn
5762 $x{guaranteed → gɛrəntid ; # gwɑræntid gɑræntid
16725 $x{integer → ɪntədʒər ; # ɪntidʒər
18764 $x{untied → əntɑɪd ; # əntid
Dinternal_raw_IPA-old.txt8115 anted ˈæntid, ˈæntəd
8118 antediluvian %11317 ˌæntidɪlˈuviən, ˌæntɪdəlˈuviən
8368 antidepressant %19681 ˌæntidəprˈɛsənt, ˌæntidɪprˈɛsənt
8370 antiderivative ˌæntidərˈɪvətɪv
8371 antidiphtheritic ˌæntidˌɪfθərˈɪtɪk
8372 antidiscrimination %16287 ˌæntidəskrˌɪmənˈeʃən, ˌæntạdəskrˌɪmənˈeʃən
8373 antidisestablishmentarianism ˌæntidˌɪsɛstˌæblɪʃməntˈɛriənˌɪzəm
8374 antidiuretic ˌæntidˌaɪərˈɛtɪk
8382 antidumping ˌæntidˈəmpɪŋ, ˌæntạdˈəmpɪŋ
Dinternal_raw_IPA.txt6960 anted %33461 ˈæntid, ˈæntəd
6962 antediluvian %22610 ˌæntidɪlˈuviən, ˌæntɪdəlˈuviən
7192 antidepressant %30690 ˌæntidəprˈɛsənt, ˌæntidɪprˈɛsənt
7194 antiderivative %29002 ˌæntidərˈɪvətɪv
7195 antidiphtheritic ˌæntidˌɪfθərˈɪtɪk
7196 antidiscrimination %25525 ˌæntidəskrˌɪmənˈeʃən, ˌæntɑɪdəskrˌɪmənˈeʃən
7197 antidisestablishmentarianism ˌæntidˌɪsɛstˌæblɪʃməntˈɛriənˌɪzəm
7198 antidiuretic %35010 ˌæntidˌaɪərˈɛtɪk
7205 antidumping %36243 ˌæntidˈəmpɪŋ, ˌæntɑɪdˈəmpɪŋ