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Searched refs:octets_per_if_num (Results 1 – 11 of 11) sorted by relevance

/external/u-boot/drivers/ddr/marvell/a38x/
Dddr3_debug.c113 u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE); in ddr3_tip_reg_dump() local
136 bus_id < octets_per_if_num; in ddr3_tip_reg_dump()
147 bus_id < octets_per_if_num; in ddr3_tip_reg_dump()
692 u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE); in ddr3_tip_read_adll_value() local
701 for (bus_id = 0; bus_id < octets_per_if_num; in ddr3_tip_read_adll_value()
710 octets_per_if_num + bus_id] = in ddr3_tip_read_adll_value()
726 u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE); in ddr3_tip_write_adll_value() local
735 for (bus_id = 0; bus_id < octets_per_if_num; in ddr3_tip_write_adll_value()
739 octets_per_if_num + in ddr3_tip_write_adll_value()
761 u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE); in read_phase_value() local
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Dddr3_training_pbs.c51 u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE); in ddr3_tip_pbs() local
83 for (pup = 0; pup < octets_per_if_num; pup++) { in ddr3_tip_pbs()
96 for (pup = 0; pup < octets_per_if_num; pup++) { in ddr3_tip_pbs()
172 for (pup = 0; pup < octets_per_if_num; pup++) { in ddr3_tip_pbs()
331 for (pup = 0; pup < octets_per_if_num; pup++) { in ddr3_tip_pbs()
346 for (pup = 0; pup < octets_per_if_num; pup++) { in ddr3_tip_pbs()
369 for (pup = 0; pup < octets_per_if_num; pup++) { in ddr3_tip_pbs()
396 for (pup = 0; pup < octets_per_if_num; pup++) { in ddr3_tip_pbs()
457 for (pup = 0; pup < octets_per_if_num; pup++) { in ddr3_tip_pbs()
474 for (pup = 0; pup < octets_per_if_num; pup++) { in ddr3_tip_pbs()
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Dmv_ddr_topology.c44 unsigned int octets_per_if_num = ddr3_tip_dev_attr_get(0, MV_ATTR_OCTET_PER_INTERFACE); in mv_ddr_topology_map_update() local
80 for (i = 0; i < octets_per_if_num; i++) { in mv_ddr_topology_map_update()
101 for (i = 0; i < octets_per_if_num; i++) { in mv_ddr_topology_map_update()
144 unsigned int octets_per_if_num = ddr3_tip_dev_attr_get(0, MV_ATTR_OCTET_PER_INTERFACE); in mv_ddr_bus_bit_mask_get() local
165 pri_and_ext_bus_width |= 1 << (octets_per_if_num - 1); in mv_ddr_bus_bit_mask_get()
Dddr3_init.c41 u32 octets_per_if_num; in ddr3_init() local
104 octets_per_if_num = ddr3_tip_dev_attr_get(0, MV_ATTR_OCTET_PER_INTERFACE); in ddr3_init()
107 MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(tm->bus_act_mask, octets_per_if_num)) in ddr3_init()
127 u32 octets_per_if_num = ddr3_tip_dev_attr_get(DEV_NUM_0, MV_ATTR_OCTET_PER_INTERFACE); in mv_ddr_get_memory_size_per_cs_in_bits() local
130 for (bus_cnt = 0; bus_cnt < octets_per_if_num - 1/* ignore ecc octet */; bus_cnt++) { in mv_ddr_get_memory_size_per_cs_in_bits()
Dddr3_training_leveling.c32 u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE); in ddr3_tip_max_cs_get() local
38 for (bus_id = 0; bus_id < octets_per_if_num; bus_id++) { in ddr3_tip_max_cs_get()
74 u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE); in ddr3_tip_dynamic_read_leveling() local
229 bus_num < octets_per_if_num; in ddr3_tip_dynamic_read_leveling()
295 bus_num < octets_per_if_num; in ddr3_tip_dynamic_read_leveling()
438 u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE); in ddr3_tip_dynamic_per_bit_read_leveling() local
444 bus_num <= octets_per_if_num; bus_num++) { in ddr3_tip_dynamic_per_bit_read_leveling()
601 bus_num < octets_per_if_num; in ddr3_tip_dynamic_per_bit_read_leveling()
675 bus_num < octets_per_if_num; in ddr3_tip_dynamic_per_bit_read_leveling()
707 for (bus_num = 0; bus_num < octets_per_if_num; in ddr3_tip_dynamic_per_bit_read_leveling()
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Dddr3_training_ip_engine.c355 u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE); in ddr3_tip_ip_training() local
358 if (pup_num >= octets_per_if_num) { in ddr3_tip_ip_training()
492 mask_dq_num_of_regs = octets_per_if_num * BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training()
493 mask_pup_num_of_regs = octets_per_if_num; in ddr3_tip_ip_training()
505 for (pup_id = 0; pup_id < octets_per_if_num; in ddr3_tip_ip_training()
707 u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE); in ddr3_tip_read_training_result() local
732 if (pup_num >= octets_per_if_num) { in ddr3_tip_read_training_result()
750 end_pup = octets_per_if_num - 1; in ddr3_tip_read_training_result()
973 u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE); in ddr3_tip_ip_training_wrapper_int() local
989 (pup_num >= octets_per_if_num) || in ddr3_tip_ip_training_wrapper_int()
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Dddr3_training_hw_algo.c51 u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE); in ddr3_tip_write_additional_odt_setting() local
72 pup_index < octets_per_if_num; in ddr3_tip_write_additional_odt_setting()
166 u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE); in ddr3_tip_vref() local
183 pup < octets_per_if_num; pup++) { in ddr3_tip_vref()
219 num_pup = octets_per_if_num * MAX_INTERFACE_NUM; in ddr3_tip_vref()
234 pup < octets_per_if_num; in ddr3_tip_vref()
260 pup < octets_per_if_num; pup++) { in ddr3_tip_vref()
274 pup < octets_per_if_num; pup++) { in ddr3_tip_vref()
602 pup < octets_per_if_num; pup++) { in ddr3_tip_vref()
Dddr3_training_centralization.c63 u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE); in ddr3_tip_centralization() local
105 bus_id < octets_per_if_num; bus_id++) { in ddr3_tip_centralization()
134 bus_id <= octets_per_if_num - 1; in ddr3_tip_centralization()
352 bus_id <= (octets_per_if_num - 1); bus_id++) { in ddr3_tip_centralization()
508 u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE); in ddr3_tip_special_rx() local
547 pup_id <= octets_per_if_num; pup_id++) { in ddr3_tip_special_rx()
698 u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE); in ddr3_tip_print_centralization_result() local
705 for (bus_id = 0; bus_id < octets_per_if_num; in ddr3_tip_print_centralization_result()
Dddr3_training_ip_flow.h59 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, octets_per_if_num/* FIXME: get from ATF */) \ argument
60 ((octets_per_if_num == 9/* FIXME: get from ATF */) && \
64 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, octets_per_if_num/* FIXME: get from ATF */) \ argument
65 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, octets_per_if_num) || DDR3_IS_16BIT_DRAM_MODE(mask))
Dddr3_training.c321 u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE); in calc_cs_num() local
324 for (bus_cnt = 0; bus_cnt < octets_per_if_num; bus_cnt++) { in calc_cs_num()
365 u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE); in hws_ddr3_tip_init_controller() local
386 bus_index < octets_per_if_num; in hws_ddr3_tip_init_controller()
408 if (MV_DDR_IS_HALF_BUS_DRAM_MODE(tm->bus_act_mask, octets_per_if_num)) in hws_ddr3_tip_init_controller()
495 bus_cnt < octets_per_if_num; in hws_ddr3_tip_init_controller()
698 u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE); in ddr3_tip_rev2_rank_control() local
701 for (bus_cnt = 0; bus_cnt < octets_per_if_num; bus_cnt++) { in ddr3_tip_rev2_rank_control()
752 u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE); in ddr3_tip_rev3_rank_control() local
755 for (bus_cnt = 1; bus_cnt < octets_per_if_num; bus_cnt++) { in ddr3_tip_rev3_rank_control()
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Dmv_ddr_plat.c1375 u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE); in ddr3_tip_configure_phy() local
1417 phy_id < octets_per_if_num; in ddr3_tip_configure_phy()