| /external/deqp-deps/glslang/SPIRV/ |
| D | doc.cpp | 1520 InstructionDesc[OpSource].operands.push(OperandSource, ""); in Parameterize()
1521 InstructionDesc[OpSource].operands.push(OperandLiteralNumber, "'Version'"); in Parameterize()
1522 InstructionDesc[OpSource].operands.push(OperandId, "'File'", true); in Parameterize()
1523 InstructionDesc[OpSource].operands.push(OperandLiteralString, "'Source'", true); in Parameterize()
1525 InstructionDesc[OpSourceContinued].operands.push(OperandLiteralString, "'Continued Source'"); in Parameterize()
1527 InstructionDesc[OpSourceExtension].operands.push(OperandLiteralString, "'Extension'"); in Parameterize()
1529 InstructionDesc[OpName].operands.push(OperandId, "'Target'"); in Parameterize()
1530 InstructionDesc[OpName].operands.push(OperandLiteralString, "'Name'"); in Parameterize()
1532 InstructionDesc[OpMemberName].operands.push(OperandId, "'Type'"); in Parameterize()
1533 InstructionDesc[OpMemberName].operands.push(OperandLiteralNumber, "'Member'"); in Parameterize()
[all …]
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| /external/mesa3d/src/compiler/glsl/ |
| D | ir_validate.cpp | 241 assert(ir->operands[i] == NULL); in visit_leave()
245 assert(ir->operands[i] != NULL); in visit_leave()
250 assert(ir->operands[0]->type == ir->type); in visit_leave()
254 assert(ir->operands[0]->type->is_boolean()); in visit_leave()
258 assert(ir->type == ir->operands[0]->type); in visit_leave()
263 assert(ir->operands[0]->type->base_type == GLSL_TYPE_INT || in visit_leave()
264 ir->operands[0]->type->is_float() || in visit_leave()
265 ir->operands[0]->type->is_double() || in visit_leave()
266 ir->operands[0]->type->base_type == GLSL_TYPE_INT64); in visit_leave()
267 assert(ir->type == ir->operands[0]->type); in visit_leave()
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| D | opt_algebraic.cpp | 181 if (ir->operands[0]->type->is_vector()) in update_type()
182 ir->type = ir->operands[0]->type; in update_type()
184 ir->type = ir->operands[1]->type; in update_type()
195 ir_swizzle *x = expr0->operands[0]->as_swizzle(); in try_replace_with_dot()
196 ir_swizzle *y = expr0->operands[1]->as_swizzle(); in try_replace_with_dot()
197 ir_swizzle *z = expr1->operands[0]->as_swizzle(); in try_replace_with_dot()
198 ir_swizzle *w = expr1->operands[1]->as_swizzle(); in try_replace_with_dot()
233 ir_rvalue *temp = ir2->operands[op2]; in reassociate_operands()
234 ir2->operands[op2] = ir1->operands[op1]; in reassociate_operands()
235 ir1->operands[op1] = temp; in reassociate_operands()
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| D | lower_instructions.cpp | 197 ir->operands[1] = new(ir) ir_expression(ir_unop_neg, ir->operands[1]->type, in sub_to_add_neg()
198 ir->operands[1], NULL); in sub_to_add_neg()
205 assert(ir->operands[1]->type->is_float() || ir->operands[1]->type->is_double()); in div_to_mul_rcp()
210 ir->operands[1]->type, in div_to_mul_rcp()
211 ir->operands[1]); in div_to_mul_rcp()
216 ir->operands[1] = expr; in div_to_mul_rcp()
224 assert(ir->operands[1]->type->is_integer()); in int_div_to_mul_rcp()
234 ir->operands[1]->type->vector_elements, in int_div_to_mul_rcp()
235 ir->operands[1]->type->matrix_columns); in int_div_to_mul_rcp()
237 if (ir->operands[1]->type->base_type == GLSL_TYPE_INT) in int_div_to_mul_rcp()
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| D | opt_rebalance_tree.cpp | 75 ir_rvalue *remainder = root->operands[1]; in tree_to_vine()
80 remainder_temp->operands[0]->as_expression() : NULL; in tree_to_vine()
86 ((ir_expression *)remainder)->operands[1] : NULL; in tree_to_vine()
91 ((ir_expression *)remainder)->operands[0] = tempptr->operands[1]; in tree_to_vine()
92 tempptr->operands[1] = remainder; in tree_to_vine()
94 ((ir_expression *)vine_tail)->operands[1] = tempptr; in tree_to_vine()
107 ir_expression *child = (ir_expression *)scanner->operands[1]; in compression()
108 scanner->operands[1] = child->operands[1]; in compression()
109 scanner = (ir_expression *)scanner->operands[1]; in compression()
110 child->operands[1] = scanner->operands[0]; in compression()
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| D | opt_flip_matrices.cpp | 73 !ir->operands[0]->type->is_matrix() || in visit_enter()
74 !ir->operands[1]->type->is_vector()) in visit_enter()
77 ir_variable *mat_var = ir->operands[0]->variable_referenced(); in visit_enter()
84 ir_dereference_variable *deref = ir->operands[0]->as_dereference_variable(); in visit_enter()
90 ir->operands[0] = ir->operands[1]; in visit_enter()
91 ir->operands[1] = new(mem_ctx) ir_dereference_variable(mvp_transpose); in visit_enter()
96 ir_dereference_array *array_ref = ir->operands[0]->as_dereference_array(); in visit_enter()
101 ir->operands[0] = ir->operands[1]; in visit_enter()
102 ir->operands[1] = array_ref; in visit_enter()
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| D | lower_vector_insert.cpp | 69 expr->operands[2]->constant_expression_value(factory.mem_ctx); in handle_rvalue()
80 factory.make_temp(expr->operands[0]->type, "vec_tmp"); in handle_rvalue()
84 factory.emit(assign(temp, expr->operands[0])); in handle_rvalue()
85 factory.emit(assign(temp, expr->operands[1], mask)); in handle_rvalue()
104 factory.make_temp(expr->operands[0]->type, "vec_tmp"); in handle_rvalue()
107 factory.make_temp(expr->operands[1]->type, "src_temp"); in handle_rvalue()
109 factory.emit(assign(temp, expr->operands[0])); in handle_rvalue()
110 factory.emit(assign(src_temp, expr->operands[1])); in handle_rvalue()
112 assert(expr->operands[2]->type == glsl_type::int_type || in handle_rvalue()
113 expr->operands[2]->type == glsl_type::uint_type); in handle_rvalue()
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| /external/clang/test/SemaOpenCL/ |
| D | invalid-logical-ops-1.1.cl | 10 int flaf = 0.0f && 0.0f; // expected-error {{invalid operands}}
11 int flof = 0.0f || 0.0f; // expected-error {{invalid operands}}
12 float fbaf = 0.0f & 0.0f; // expected-error {{invalid operands}}
13 float fbof = 0.0f | 0.0f; // expected-error {{invalid operands}}
14 float fbxf = 0.0f ^ 0.0f; // expected-error {{invalid operands}}
15 int flai = 0.0f && 0; // expected-error {{invalid operands}}
16 int floi = 0.0f || 0; // expected-error {{invalid operands}}
17 float ibaf = 0 & 0.0f; // expected-error {{invalid operands}}
18 float ibof = 0 | 0.0f; // expected-error {{invalid operands}}
25 int4 f4laf = f4 && 0.0f; // expected-error {{invalid operands}}
[all …]
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| D | invalid-logical-ops-1.2.cl | 13 float fbaf = 0.0f & 0.0f; // expected-error {{invalid operands}}
14 float fbof = 0.0f | 0.0f; // expected-error {{invalid operands}}
15 float fbxf = 0.0f ^ 0.0f; // expected-error {{invalid operands}}
18 float ibaf = 0 & 0.0f; // expected-error {{invalid operands}}
19 float ibof = 0 | 0.0f; // expected-error {{invalid operands}}
28 float4 f4baf = f4 & 0.0f; // expected-error {{invalid operands}}
29 float4 f4bof = f4 | 0.0f; // expected-error {{invalid operands}}
30 float4 f4bxf = f4 ^ 0.0f; // expected-error {{invalid operands}}
38 double fbaf = 0.0 & 0.0; // expected-error {{invalid operands}}
39 double fbof = 0.0 | 0.0; // expected-error {{invalid operands}}
[all …]
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| /external/capstone/arch/XCore/ |
| D | XCoreInstPrinter.c | 68 … MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].type = XCORE_OP_REG; in XCore_insn_extract()
69 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
90 … MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].type = XCORE_OP_MEM; in XCore_insn_extract()
91 …MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.base = (uint8_t)i… in XCore_insn_extract()
92 …MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.index = XCORE_REG… in XCore_insn_extract()
93 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in XCore_insn_extract()
94 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in XCore_insn_extract()
109 …MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.index = (uint8_t)… in XCore_insn_extract()
114 … MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = atoi(p2); in XCore_insn_extract()
129 … MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].type = XCORE_OP_REG; in XCore_insn_extract()
[all …]
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| /external/capstone/bindings/ocaml/ |
| D | ocaml.c | 126 switch(insn[j-1].detail->arm.operands[i].type) { in _cs_disasm()
130 Store_field(tmp, 0, Val_int(insn[j-1].detail->arm.operands[i].reg)); in _cs_disasm()
134 Store_field(tmp, 0, Val_int(insn[j-1].detail->arm.operands[i].imm)); in _cs_disasm()
138 Store_field(tmp, 0, Val_int(insn[j-1].detail->arm.operands[i].imm)); in _cs_disasm()
142 Store_field(tmp, 0, Val_int(insn[j-1].detail->arm.operands[i].imm)); in _cs_disasm()
146 Store_field(tmp, 0, caml_copy_double(insn[j-1].detail->arm.operands[i].fp)); in _cs_disasm()
151 Store_field(tmp3, 0, Val_int(insn[j-1].detail->arm.operands[i].mem.base)); in _cs_disasm()
152 Store_field(tmp3, 1, Val_int(insn[j-1].detail->arm.operands[i].mem.index)); in _cs_disasm()
153 Store_field(tmp3, 2, Val_int(insn[j-1].detail->arm.operands[i].mem.scale)); in _cs_disasm()
154 Store_field(tmp3, 3, Val_int(insn[j-1].detail->arm.operands[i].mem.disp)); in _cs_disasm()
[all …]
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| /external/v8/src/interpreter/ |
| D | bytecode-traits.h | 79 template <AccumulatorUse accumulator_use, OperandType... operands>
87 1, OperandScaler<operands, OperandScale::kSingle>::kSize...>::kValue;
89 1, OperandScaler<operands, OperandScale::kDouble>::kSize...>::kValue;
91 1, OperandScaler<operands, OperandScale::kQuadruple>::kSize...>::kValue;
93 static const int kOperandCount = sizeof...(operands);
96 template <AccumulatorUse accumulator_use, OperandType... operands>
98 BytecodeTraits<accumulator_use, operands...>::kOperandTypes[] = {
99 operands...};
100 template <AccumulatorUse accumulator_use, OperandType... operands>
102 BytecodeTraits<accumulator_use, operands...>::kOperandTypeInfos[] = {
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| /external/capstone/arch/AArch64/ |
| D | AArch64InstPrinter.c | 56 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_MEM; in set_mem_access()
57 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.base = ARM64_REG_… in set_mem_access()
58 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.index = ARM64_REG… in set_mem_access()
59 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = 0; in set_mem_access()
119 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in AArch64_printInst()
120 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getRe… in AArch64_printInst()
122 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in AArch64_printInst()
123 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = getWRegFromXReg… in AArch64_printInst()
173 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in AArch64_printInst()
174 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getRe… in AArch64_printInst()
[all …]
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| /external/capstone/bindings/java/ |
| D | TestX86.java | 46 X86.OpInfo operands = (X86.OpInfo) ins.operands; in print_ins_detail() local
48 System.out.printf("\tPrefix: %s\n", array2hex(operands.prefix)); in print_ins_detail()
50 System.out.printf("\tOpcode: %s\n", array2hex(operands.opcode)); in print_ins_detail()
53 System.out.printf("\trex: 0x%x\n", operands.rex); in print_ins_detail()
56 System.out.printf("\taddr_size: %d\n", operands.addrSize); in print_ins_detail()
59 System.out.printf("\tmodrm: 0x%x\n", operands.modrm); in print_ins_detail()
62 System.out.printf("\tdisp: 0x%x\n", operands.disp); in print_ins_detail()
67 System.out.printf("\tsib: 0x%x\n", operands.sib); in print_ins_detail()
68 if (operands.sib != 0) in print_ins_detail()
70 ins.regName(operands.sibBase), ins.regName(operands.sibIndex), operands.sibScale); in print_ins_detail()
[all …]
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| D | TestArm.java | 40 Arm.OpInfo operands = (Arm.OpInfo) ins.operands; in print_ins_detail() local
42 if (operands.op.length != 0) { in print_ins_detail()
43 System.out.printf("\top_count: %d\n", operands.op.length); in print_ins_detail()
44 for (int c=0; c<operands.op.length; c++) { in print_ins_detail()
45 Arm.Operand i = (Arm.Operand) operands.op[c]; in print_ins_detail()
82 if (operands.writeback) in print_ins_detail()
85 if (operands.updateFlags) in print_ins_detail()
88 if (operands.cc != ARM_CC_AL && operands.cc != ARM_CC_INVALID) in print_ins_detail()
89 System.out.printf("\tCode condition: %d\n", operands.cc); in print_ins_detail()
91 if (operands.cpsMode > 0) in print_ins_detail()
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| /external/tensorflow/tensorflow/compiler/xla/service/ |
| D | ar_crs_combiner_test.cc | 44 auto i1 = root_tuple->operands()[0]; in TEST_F()
45 auto i2 = root_tuple->operands()[1]; in TEST_F()
64 auto i1 = root_tuple->operands()[0]; in TEST_F()
65 auto i2 = root_tuple->operands()[1]; in TEST_F()
83 auto i1 = root_tuple->operands()[0]; in TEST_F()
84 auto i2 = root_tuple->operands()[1]; in TEST_F()
104 auto i1 = root_tuple->operands()[0]; in TEST_F()
105 auto i2 = root_tuple->operands()[1]; in TEST_F()
124 auto i1 = root_tuple->operands()[0]; in TEST_F()
125 auto i2 = root_tuple->operands()[1]; in TEST_F()
[all …]
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| /external/capstone/arch/ARM/ |
| D | ARMInstPrinter.c | 129 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_MEM; in set_mem_access()
130 …MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.base = ARM_REG_INVALI… in set_mem_access()
131 …MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.index = ARM_REG_INVAL… in set_mem_access()
132 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.scale = 1; in set_mem_access()
133 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.disp = 0; in set_mem_access()
143 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; in op_addImm()
144 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = v; in op_addImm()
189 …MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].shift.type = (arm_shifter… in printRegImmShift()
191 …MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.type = (arm_shi… in printRegImmShift()
199 …MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].shift.value = translateSh… in printRegImmShift()
[all …]
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| /external/capstone/arch/X86/ |
| D | X86ATTInstPrinter.c | 273 MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_MEM; in printSrcIdx()
274 MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->x86opsize; in printSrcIdx()
275 …MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = X86_REG_INV… in printSrcIdx()
276 …MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = X86_REG_INVALI… in printSrcIdx()
277 …MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.index = X86_REG_INVAL… in printSrcIdx()
278 MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = 1; in printSrcIdx()
279 MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = 0; in printSrcIdx()
289 MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = reg; in printSrcIdx()
307 MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_MEM; in printDstIdx()
308 MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->x86opsize; in printDstIdx()
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| D | X86IntelInstPrinter.c | 299 MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_MEM; in printSrcIdx()
300 MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->x86opsize; in printSrcIdx()
301 …MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = X86_REG_INV… in printSrcIdx()
302 …MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = X86_REG_INVALI… in printSrcIdx()
303 …MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.index = X86_REG_INVAL… in printSrcIdx()
304 MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = 1; in printSrcIdx()
305 MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = 0; in printSrcIdx()
315 MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = reg; in printSrcIdx()
330 MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_MEM; in printDstIdx()
331 MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->x86opsize; in printDstIdx()
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| /external/google-breakpad/src/third_party/libdisasm/ |
| D | x86_insn.c | 21 if (! insn || ! insn->operands ) { in x86_get_address()
25 for (op_lst = insn->operands; op_lst; op_lst = op_lst->next ) { in x86_get_address()
42 if (! insn || ! insn->operands ) { in x86_get_rel_offset()
46 for (op_lst = insn->operands; op_lst; op_lst = op_lst->next ) { in x86_get_rel_offset()
59 if (! insn || ! insn->operands ) { in x86_get_branch_target()
63 for (op_lst = insn->operands; op_lst; op_lst = op_lst->next ) { in x86_get_branch_target()
73 if (! insn || ! insn->operands ) { in x86_get_imm()
77 for (op_lst = insn->operands; op_lst; op_lst = op_lst->next ) { in x86_get_imm()
96 if (! insn || ! insn->operands ) { in x86_get_raw_imm()
101 if ( IS_PROPER_IMM( insn->operands ) ) { in x86_get_raw_imm()
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| /external/vixl/tools/test_generator/ |
| D | generator.py | 187 def BuildOperandDefinition(operands): argument
210 [operand[1] for operand in operands],
215 self.it_condition.format(**dict(operands)) if self.it_condition else "al"
241 BuildOperandDefinition(operands)
242 for operands in itertools.product(*variants)
243 if filter_lambda(**dict(operands))
312 def __init__(self, test_name, test_isa, test_type, mnemonics, operands, argument
325 self.operands = deepcopy(operands)
326 self.operands.ExcludeVariants("Register", ["r13", "r15"])
328 self.operands = operands
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| /external/tensorflow/tensorflow/compiler/xla/service/gpu/ |
| D | cudnn_batchnorm_rewriter.cc | 77 std::vector<HloInstruction*> operands(batch_norm->operands().begin(), in HandleBatchNormInference() local
78 batch_norm->operands().end()); in HandleBatchNormInference()
79 operands.push_back(epsilon); in HandleBatchNormInference()
80 operands.push_back(feature_index); in HandleBatchNormInference()
83 batch_norm->shape(), operands, kCudnnBatchNormForwardInferenceCallTarget); in HandleBatchNormInference()
113 std::vector<HloInstruction*> operands(batch_norm->operands().begin(), in HandleBatchNormTraining() local
114 batch_norm->operands().end()); in HandleBatchNormTraining()
115 operands.push_back(epsilon); in HandleBatchNormTraining()
116 operands.push_back(feature_index); in HandleBatchNormTraining()
120 batch_norm->shape(), operands, in HandleBatchNormTraining()
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| /external/mesa3d/src/gallium/drivers/etnaviv/ |
| D | etnaviv_disasm.c | 413 print_opc_default(struct opc_operands *operands) in print_opc_default() argument
415 print_dst(operands->dst, true); in print_opc_default()
416 print_src(operands->src0, true); in print_opc_default()
417 print_src(operands->src1, true); in print_opc_default()
418 print_src(operands->src2, false); in print_opc_default()
422 print_opc_mov(struct opc_operands *operands) in print_opc_mov() argument
425 printf("a%u", operands->dst->reg); in print_opc_mov()
426 print_components(operands->dst->comps); in print_opc_mov()
429 print_src(operands->src0, true); in print_opc_mov()
430 print_src(operands->src1, true); in print_opc_mov()
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| /external/antlr/tool/src/main/java/org/antlr/analysis/ |
| D | SemanticContext.java | 307 protected final Set<SemanticContext> operands = new HashSet<SemanticContext>(); field in SemanticContext.CommutativePredicate
313 operands.addAll(predicate.operands); in CommutativePredicate()
315 operands.add(a); in CommutativePredicate()
320 operands.addAll(predicate.operands); in CommutativePredicate()
322 operands.add(b); in CommutativePredicate()
332 operands.addAll(predicate.operands); in CommutativePredicate()
334 operands.add(context); in CommutativePredicate()
344 for (SemanticContext semctx : operands) { in getGatedPredicateContext()
355 for (SemanticContext semctx : operands) { in hasUserSemanticPredicate()
365 for (SemanticContext semctx : operands) { in isSyntacticPredicate()
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| /external/capstone/arch/SystemZ/ |
| D | SystemZInstPrinter.c | 63 MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_MEM; in printAddress()
64 …MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.base = (uint8_t)Sys… in printAddress()
65 …MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.index = (uint8_t)Sy… in printAddress()
66 MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.disp = Disp; in printAddress()
71 MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; in printAddress()
72 MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Disp; in printAddress()
88 MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_REG; in _printOperand()
89 MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].reg = reg; in _printOperand()
108 MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; in _printOperand()
109 MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Imm; in _printOperand()
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