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Searched refs:pfmul (Results 1 – 25 of 34) sorted by relevance

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/external/mesa3d/src/mesa/x86-64/
Dxform4.S265 pfmul %mm0, %mm4 /* x1*m11 | x0*m00 */
268 pfmul %mm2, %mm5 /* x3*m32 | x2*m22 */
270 pfmul %mm1, %mm6 /* x3*m31 | x3*m30 */
331 pfmul %mm0, %mm4 /* x1*m11 | x0*m00 */
335 pfmul %mm2, %mm5 /* x2*m21 | x2*m20 */
338 pfmul %mm1, %mm6 /* x3*m32 | x2*m22 */
389 pfmul %mm0, %mm4 /* x1*m11 | x0*m00 */
395 pfmul %mm1, %mm6 /* x3*m31 | x3*m30 */
454 pfmul %mm1, %mm4 /* x1*m11 | x0*m01 */
457 pfmul %mm0, %mm3 /* x1*m10 | x0*m00 */
[all …]
/external/libjpeg-turbo/simd/i386/
Djquant-3dn.asm163 pfmul mm0, MMWORD [MMBLOCK(0,0,edx,SIZEOF_FAST_FLOAT)]
164 pfmul mm1, MMWORD [MMBLOCK(0,1,edx,SIZEOF_FAST_FLOAT)]
167 pfmul mm2, MMWORD [MMBLOCK(0,2,edx,SIZEOF_FAST_FLOAT)]
168 pfmul mm3, MMWORD [MMBLOCK(0,3,edx,SIZEOF_FAST_FLOAT)]
187 pfmul mm6, MMWORD [MMBLOCK(1,0,edx,SIZEOF_FAST_FLOAT)]
188 pfmul mm1, MMWORD [MMBLOCK(1,1,edx,SIZEOF_FAST_FLOAT)]
191 pfmul mm3, MMWORD [MMBLOCK(1,2,edx,SIZEOF_FAST_FLOAT)]
192 pfmul mm4, MMWORD [MMBLOCK(1,3,edx,SIZEOF_FAST_FLOAT)]
/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-mca/X86/Generic/
Dresources-3dnow.s36 pfmul %mm0, %mm2 label
37 pfmul (%rax), %mm2 label
111 # CHECK-NEXT: 1 3 1.00 pfmul %mm0, %mm2
112 # CHECK-NEXT: 2 9 1.00 * pfmul (%rax), %mm2
179 # CHECK-NEXT: - - - 1.00 - - - - pfmul %mm0, %mm2
180 # CHECK-NEXT: - - - 1.00 - - 0.50 0.50 pfmul (%rax), %mm2
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dcommute-3dnow.ll99 ; X32-NEXT: pfmul (%eax), %mm0
100 ; X32-NEXT: pfmul (%ecx), %mm0
107 ; X64-NEXT: pfmul (%rsi), %mm0
108 ; X64-NEXT: pfmul (%rdx), %mm0
114 %4 = tail call x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx %1, x86_mmx %2)
115 %5 = tail call x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx %3, x86_mmx %4)
119 declare x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx, x86_mmx)
D3dnow-schedule.ll167 ; CHECK-NEXT: pfmul %mm1, %mm0 # sched: [3:1.00]
168 ; CHECK-NEXT: pfmul (%rdi), %mm0 # sched: [9:1.00]
171 %1 = call x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx %a0, x86_mmx %a1)
173 %3 = call x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx %1, x86_mmx %2)
177 declare x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx, x86_mmx) nounwind readnone
Dstack-folding-3dnow.ll95 ;CHECK: pfmul {{-?[0-9]*}}(%rsp), {{%mm[0-7]}} {{.*#+}} 8-byte Folded Reload
97 %2 = call x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx %a, x86_mmx %b) nounwind readnone
100 declare x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx, x86_mmx) nounwind readnone
D3dnow-intrinsics.ll356 ; X86-NEXT: pfmul %mm1, %mm2
368 ; X64-NEXT: pfmul %mm0, %mm1
375 %2 = tail call x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx %0, x86_mmx %1)
380 declare x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx, x86_mmx) nounwind readnone
/external/llvm/test/MC/X86/
D3DNow.s40 pfmul %mm2, %mm1 label
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/X86/
D3DNow.s40 pfmul %mm2, %mm1 label
/external/swiftshader/third_party/LLVM/test/MC/X86/
D3DNow.s40 pfmul %mm2, %mm1 label
/external/capstone/suite/MC/X86/
D3DNow.s.cs13 0x0f,0x0f,0xca,0xb4 = pfmul %mm2, %mm1
/external/llvm/test/CodeGen/X86/
Dstack-folding-3dnow.ll95 ;CHECK: pfmul {{-?[0-9]*}}(%rsp), {{%mm[0-7]}} {{.*#+}} 8-byte Folded Reload
97 %2 = call x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx %a, x86_mmx %b) nounwind readnone
100 declare x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx, x86_mmx) nounwind readnone
D3dnow-intrinsics.ll113 ; CHECK: pfmul
117 %2 = tail call x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx %0, x86_mmx %1)
122 declare x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx, x86_mmx) nounwind readnone
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
D3dnow-intrinsics.ll113 ; CHECK: pfmul
117 %2 = tail call x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx %0, x86_mmx %1)
122 declare x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx, x86_mmx) nounwind readnone
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/X86/
Damd3dnow.txt21 # CHECK: pfmul %mm6, %mm0
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86Instr3DNow.td75 defm PFMUL : I3DNow_binop_rm_int<0xB4, "pfmul">;
DX86GenAsmMatcher.inc4298 { X86::PFMULrr, "pfmul", Convert__Reg1_1__Tie0__Reg1_0, { MCK_VR64, MCK_VR64 }, 0},
4299 { X86::PFMULrm, "pfmul", Convert__Reg1_1__Tie0__Mem5_0, { MCK_Mem, MCK_VR64 }, 0},
DX86GenAsmWriter.inc3957 "n\t\000pfmul\t\000pfnacc\t\000pfpnacc\t\000pfrcpit1\t\000pfrcpit2\t\000"
DX86GenAsmWriter1.inc3924 "\000pfcmpge\t\000pfcmpgt\t\000pfmax\t\000pfmin\t\000pfmul\t\000pfnacc\t"
/external/llvm/lib/Target/X86/
DX86Instr3DNow.td75 defm PFMUL : I3DNow_binop_rm_int<0xB4, "pfmul">;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86Instr3DNow.td66 defm PFMUL : I3DNow_binop_rm_int<0xB4, "pfmul", WriteFAdd, 1>;
/external/libaom/libaom/third_party/libyuv/source/
Dx86inc.asm1099 AVX_INSTR pfmul, 1, 0, 1
/external/mesa3d/src/mesa/x86/
Dassyntax.h1619 #define PFMUL(a, b) pfmul P_ARG2(a, b)
/external/swiftshader/third_party/LLVM/include/llvm/
DIntrinsics.gen110 x86_3dnow_pfmul, // llvm.x86.3dnow.pfmul
637 "llvm.x86.3dnow.pfmul",
2262 return Intrinsic::x86_3dnow_pfmul; // "86.3dnow.pfmul"
6213 case Intrinsic::x86_3dnow_pfmul: // llvm.x86.3dnow.pfmul
7545 case Intrinsic::x86_3dnow_pfmul: // llvm.x86.3dnow.pfmul
/external/swiftshader/third_party/llvm-7.0/configs/common/include/llvm/IR/
DIntrinsicEnums.inc5414 x86_3dnow_pfmul, // llvm.x86.3dnow.pfmul

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