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Searched refs:phy_con12 (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-exynos/
Ddmc_init_ddr3.c93 writel(val, &phy0_ctrl->phy_con12); in ddr3_mem_ctrl_init()
94 writel(val, &phy1_ctrl->phy_con12); in ddr3_mem_ctrl_init()
98 &phy0_ctrl->phy_con12); in ddr3_mem_ctrl_init()
100 &phy1_ctrl->phy_con12); in ddr3_mem_ctrl_init()
161 writel(val, &phy0_ctrl->phy_con12); in ddr3_mem_ctrl_init()
162 writel(val, &phy1_ctrl->phy_con12); in ddr3_mem_ctrl_init()
208 writel(val, &phy0_ctrl->phy_con12); in ddr3_mem_ctrl_init()
209 writel(val, &phy1_ctrl->phy_con12); in ddr3_mem_ctrl_init()
711 n_lock_r = readl(&phy0_ctrl->phy_con12); in ddr3_mem_ctrl_init()
714 writel(n_lock_r, &phy0_ctrl->phy_con12); in ddr3_mem_ctrl_init()
[all …]
/external/u-boot/arch/arm/mach-exynos/include/mach/
Ddmc.h342 unsigned int phy_con12; member
389 unsigned int phy_con12; member