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Searched refs:phy_timing (Results 1 – 5 of 5) sorted by relevance

/external/u-boot/drivers/ram/rockchip/
Dsdram_rk322x.c46 struct rk322x_phy_timing phy_timing; member
174 (sdram_params->phy_timing.mr[2] & CMD_ADDR_MASK) << in memory_init()
179 (sdram_params->phy_timing.mr[3] & CMD_ADDR_MASK) << in memory_init()
184 (sdram_params->phy_timing.mr[1] & CMD_ADDR_MASK) << in memory_init()
189 ((sdram_params->phy_timing.mr[0] | in memory_init()
212 (sdram_params->phy_timing.mr[1] & in memory_init()
216 (sdram_params->phy_timing.mr[2] & in memory_init()
220 (sdram_params->phy_timing.mr[3] & in memory_init()
225 (sdram_params->phy_timing.mr11 & in memory_init()
438 if (sdram_params->phy_timing.bl & PHT_BL_8) in pctl_cfg()
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Dsdram_rk3288.c52 struct rk3288_sdram_phy_timing phy_timing; member
266 if (sdram_params->phy_timing.mr[1] & DDR3_DLL_DISABLE) { in pctl_cfg()
300 copy_to_reg(&publ->dtpr[0], &sdram_params->phy_timing.dtpr0, in phy_cfg()
301 sizeof(sdram_params->phy_timing)); in phy_cfg()
840 sdram_params->phy_timing.mr[1]); in sdram_init()
843 sdram_params->phy_timing.mr[2]); in sdram_init()
846 sdram_params->phy_timing.mr[3]); in sdram_init()
985 (u32 *)&params->phy_timing, in rk3288_dmc_ofdata_to_platdata()
986 sizeof(params->phy_timing) / sizeof(u32)); in rk3288_dmc_ofdata_to_platdata()
1021 memcpy(&plat->phy_timing, of_plat->rockchip_phy_timing, in conv_of_platdata()
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Dsdram_rk3188.c49 struct rk3288_sdram_phy_timing phy_timing; member
234 if (sdram_params->phy_timing.mr[1] & DDR3_DLL_DISABLE) { in pctl_cfg()
266 copy_to_reg(&publ->dtpr[0], &sdram_params->phy_timing.dtpr0, in phy_cfg()
267 sizeof(sdram_params->phy_timing)); in phy_cfg()
829 (u32 *)&params->phy_timing, in rk3188_dmc_ofdata_to_platdata()
830 sizeof(params->phy_timing) / sizeof(u32)); in rk3188_dmc_ofdata_to_platdata()
860 memcpy(&plat->phy_timing, of_plat->rockchip_phy_timing, in conv_of_platdata()
861 sizeof(plat->phy_timing)); in conv_of_platdata()
/external/u-boot/arch/arm/mach-rockchip/rk3036/
Dsdram_rk3036.c461 (ddr_timing.phy_timing.mr[2] & CMD_ADDR_MASK) << in memory_init()
466 (ddr_timing.phy_timing.mr[3] & CMD_ADDR_MASK) << in memory_init()
471 (ddr_timing.phy_timing.mr[1] & CMD_ADDR_MASK) << in memory_init()
476 (ddr_timing.phy_timing.mr[0] & CMD_ADDR_MASK) << in memory_init()
635 clrsetbits_le32(&ddr_phy->ddrphy_reg3, 1, ddr_timing.phy_timing.bl); in phy_cfg()
636 writel(ddr_timing.phy_timing.cl_al, &ddr_phy->ddrphy_reg4a); in phy_cfg()
/external/u-boot/arch/arm/include/asm/arch-rockchip/
Dsdram_rk3036.h296 struct rk3036_phy_timing phy_timing; member