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Searched refs:phyaddr (Results 1 – 25 of 32) sorted by relevance

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/external/u-boot/board/zyxel/nsa310s/
Dnsa310s.c85 u16 phyaddr; in reset_phy() local
92 if (miiphy_read(name, 0xee, 0xee, (u16 *) &phyaddr)) { in reset_phy()
98 miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_MAC_CTRL_PG); in reset_phy()
99 miiphy_read(name, phyaddr, MV88E1318_MAC_CTRL_REG, &reg); in reset_phy()
101 miiphy_write(name, phyaddr, MV88E1318_MAC_CTRL_REG, reg); in reset_phy()
102 miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0); in reset_phy()
105 if (miiphy_reset(name, phyaddr)) in reset_phy()
114 miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_LED_PG); in reset_phy()
116 miiphy_read(name, phyaddr, MV88E1318_LED_POL_REG, &reg); in reset_phy()
121 miiphy_write(name, phyaddr, MV88E1318_LED_POL_REG, reg); in reset_phy()
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/external/u-boot/board/LaCie/common/
Dcommon.c20 void mv_phy_88e1116_init(const char *name, u16 phyaddr) in mv_phy_88e1116_init() argument
31 miiphy_write(name, phyaddr, MII_MARVELL_PHY_PAGE, 2); in mv_phy_88e1116_init()
32 miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL_REG, &reg); in mv_phy_88e1116_init()
34 miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL_REG, reg); in mv_phy_88e1116_init()
35 miiphy_write(name, phyaddr, MII_MARVELL_PHY_PAGE, 0); in mv_phy_88e1116_init()
37 if (miiphy_reset(name, phyaddr) == 0) in mv_phy_88e1116_init()
41 void mv_phy_88e1318_init(const char *name, u16 phyaddr) in mv_phy_88e1318_init() argument
51 miiphy_write(name, phyaddr, MII_MARVELL_PHY_PAGE, 3); in mv_phy_88e1318_init()
52 miiphy_read(name, phyaddr, 16, &reg); in mv_phy_88e1318_init()
54 miiphy_write(name, phyaddr, 16, reg); in mv_phy_88e1318_init()
[all …]
Dcommon.h10 void mv_phy_88e1116_init(const char *name, u16 phyaddr);
11 void mv_phy_88e1318_init(const char *name, u16 phyaddr);
/external/u-boot/drivers/net/
Dmcfmii.c137 int phyaddr, pass; in mii_discover_phy() local
144 phyaddr = -1; /* didn't find a PHY yet */ in mii_discover_phy()
145 for (pass = 1; pass <= MAX_PHY_PASSES && phyaddr < 0; ++pass) { in mii_discover_phy()
155 for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) { in mii_discover_phy()
163 phyaddr = phyno; in mii_discover_phy()
198 if (phyaddr < 0) in mii_discover_phy()
201 return phyaddr; in mii_discover_phy()
Dxilinx_emaclite.c90 int phyaddr; member
265 if (emaclite->phyaddr != -1) { in setup_phy()
266 phyread(emaclite, emaclite->phyaddr, PHY_DETECT_REG, &phyreg); in setup_phy()
271 emaclite->phyaddr); in setup_phy()
274 emaclite->phyaddr); in setup_phy()
275 emaclite->phyaddr = -1; in setup_phy()
279 if (emaclite->phyaddr == -1) { in setup_phy()
286 emaclite->phyaddr = i; in setup_phy()
295 phydev = phy_connect(emaclite->bus, emaclite->phyaddr, dev, in setup_phy()
604 emaclite->phyaddr = -1; in emaclite_ofdata_to_platdata()
[all …]
Dzynq_gem.c176 int phyaddr; member
250 if (priv->phyaddr != -1) { in phy_detection()
251 phyread(priv, priv->phyaddr, PHY_DETECT_REG, &phyreg); in phy_detection()
256 priv->phyaddr); in phy_detection()
260 priv->phyaddr); in phy_detection()
261 priv->phyaddr = -1; in phy_detection()
266 if (priv->phyaddr == -1) { in phy_detection()
273 priv->phyaddr = i; in phy_detection()
337 priv->phydev = phy_connect(priv->bus, priv->phyaddr, dev, in zynq_phy_init()
702 priv->phyaddr = -1; in zynq_gem_ofdata_to_platdata()
[all …]
Dxilinx_axi_emac.c90 int phyaddr; member
258 if (priv->phyaddr == -1) { in axiemac_phy_init()
265 priv->phyaddr = i; in axiemac_phy_init()
274 phydev = phy_connect(priv->bus, priv->phyaddr, dev, priv->interface); in axiemac_phy_init()
299 ret = phyread(priv, priv->phyaddr, MII_BMCR, &temp); in setup_phy()
304 ret = phywrite(priv, priv->phyaddr, MII_BMCR, temp); in setup_phy()
736 priv->phyaddr = -1; in axi_emac_ofdata_to_platdata()
740 priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", -1); in axi_emac_ofdata_to_platdata()
755 priv->phyaddr, phy_string_for_interface(priv->interface)); in axi_emac_ofdata_to_platdata()
Dbcm-sf2-eth.h52 int (*miiphy_read)(struct mii_dev *bus, int phyaddr, int devad,
54 int (*miiphy_write)(struct mii_dev *bus, int phyaddr, int devad,
Dmpc8xx_fec.c755 int phyaddr; in mii_discover_phy() local
757 phyaddr = -1; /* didn't find a PHY yet */ in mii_discover_phy()
758 for (pass = 1; pass <= MAX_PHY_PASSES && phyaddr < 0; ++pass) { in mii_discover_phy()
767 for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) { in mii_discover_phy()
770 phyaddr = phyno; in mii_discover_phy()
776 if (phyaddr < 0) in mii_discover_phy()
779 return phyaddr; in mii_discover_phy()
Dax88180.c259 unsigned short phyaddr; in ax88180_phy_initial() local
263 phyaddr = CONFIG_PHY_ADDR; in ax88180_phy_initial()
265 for (phyaddr = 0; phyaddr < 32; ++phyaddr) in ax88180_phy_initial()
268 priv->PhyAddr = phyaddr; in ax88180_phy_initial()
Dfec_mxc.c85 static int fec_mdio_read(struct ethernet_regs *eth, uint8_t phyaddr, in fec_mdio_read() argument
99 phy = phyaddr << FEC_MII_DATA_PA_SHIFT; in fec_mdio_read()
118 debug("%s: phy: %02x reg:%02x val:%#x\n", __func__, phyaddr, in fec_mdio_read()
150 static int fec_mdio_write(struct ethernet_regs *eth, uint8_t phyaddr, in fec_mdio_write() argument
158 phy = phyaddr << FEC_MII_DATA_PA_SHIFT; in fec_mdio_write()
174 debug("%s: phy: %02x reg:%02x val:%#x\n", __func__, phyaddr, in fec_mdio_write()
180 static int fec_phy_read(struct mii_dev *bus, int phyaddr, int dev_addr, in fec_phy_read() argument
183 return fec_mdio_read(bus->priv, phyaddr, regaddr); in fec_phy_read()
186 static int fec_phy_write(struct mii_dev *bus, int phyaddr, int dev_addr, in fec_phy_write() argument
189 return fec_mdio_write(bus->priv, phyaddr, regaddr, data); in fec_phy_write()
Dbcm-sf2-eth-gmac.c605 int gmac_miiphy_read(struct mii_dev *bus, int phyaddr, int devad, int reg) in gmac_miiphy_read() argument
618 tmp |= (phyaddr << GMAC_MII_PHY_ADDR_SHIFT) | in gmac_miiphy_read()
620 debug("MII read cmd 0x%x, phy 0x%x, reg 0x%x\n", tmp, phyaddr, reg); in gmac_miiphy_read()
633 int gmac_miiphy_write(struct mii_dev *bus, int phyaddr, int devad, int reg, in gmac_miiphy_write() argument
646 tmp |= ((phyaddr << GMAC_MII_PHY_ADDR_SHIFT) | in gmac_miiphy_write()
649 tmp, phyaddr, reg, value); in gmac_miiphy_write()
Dftmac110.c68 uint8_t phyaddr, uint8_t phyreg) in mdio_read() argument
76 | (phyaddr << PHYCR_ADDR_SHIFT) in mdio_read()
97 uint8_t phyaddr, uint8_t phyreg, uint16_t phydata) in mdio_write() argument
104 | (phyaddr << PHYCR_ADDR_SHIFT) in mdio_write()
Dsmc91111.c892 byte phyaddr = SMC_PHY_ADDR; in smc_read_phy_register() local
909 if (phyaddr & mask) in smc_read_phy_register()
988 phyaddr, phyreg, phydata); in smc_read_phy_register()
1008 byte phyaddr = SMC_PHY_ADDR; in smc_write_phy_register() local
1025 if (phyaddr & mask) in smc_write_phy_register()
1100 phyaddr, phyreg, phydata); in smc_write_phy_register()
Dsun8i_emac.c118 u32 phyaddr; member
264 *reg |= priv->phyaddr << H3_EPHY_ADDR_SHIFT; in sun8i_emac_set_syscon_ephy()
321 phydev = phy_connect(priv->bus, priv->phyaddr, dev, priv->interface); in sun8i_phy_init()
822 priv->phyaddr = -1; in sun8i_emac_eth_ofdata_to_platdata()
830 priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", -1); in sun8i_emac_eth_ofdata_to_platdata()
Dtsec.c36 .phyaddr = FEC_PHY_ADDR,
666 phydev = phy_connect(priv->bus, priv->phyaddr, priv->dev, in init_phy()
709 priv->phyaddr = tsec_info->phyaddr; in tsec_initialize()
794 priv->phyaddr = reg; in tsec_probe()
Dmvneta.c283 int phyaddr; member
576 return pp->phyaddr > PHY_MAX_ADDR; in mvneta_port_is_fixed_link()
1565 mvreg_write(pp, MVNETA_PHY_ADDR, pp->phyaddr); in mvneta_start()
1567 phydev = phy_connect(pp->bus, pp->phyaddr, dev, in mvneta_start()
1734 pp->phyaddr = PHY_MAX_ADDR + 1; in mvneta_probe()
1741 pp->phyaddr = fdtdec_get_int(blob, addr, "reg", 0); in mvneta_probe()
Daltera_tse.c432 if (priv->phyaddr) in tse_phy_init()
433 mask = 1 << priv->phyaddr; in tse_phy_init()
639 priv->phyaddr = fdtdec_get_int(blob, addr, in altera_tse_probe()
Daltera_tse.h223 unsigned int phyaddr; member
/external/u-boot/drivers/net/phy/
Dmv88e6352.c235 u16 value = 0, phyaddr, reg, port; in do_mvsw_reg_read() local
238 phyaddr = simple_strtoul(argv[1], NULL, 10); in do_mvsw_reg_read()
242 ret = sw_reg_read(name, phyaddr, port, reg, &value); in do_mvsw_reg_read()
250 u16 value = 0, phyaddr, reg, port; in do_mvsw_reg_write() local
253 phyaddr = simple_strtoul(argv[1], NULL, 10); in do_mvsw_reg_write()
258 ret = sw_reg_write(name, phyaddr, port, reg, value); in do_mvsw_reg_write()
/external/u-boot/include/
Dtsec.h53 .phyaddr = TSEC##num##_PHY_ADDR, \
63 x.phyaddr = TSEC##num##_PHY_ADDR; \
403 uint phyaddr; member
422 unsigned int phyaddr; member
/external/u-boot/board/freescale/common/
Dsgmii_riser.c28 tsec_info[i].phyaddr += SGMII_RISER_PHY_OFFSET; in fsl_sgmii_riser_init()
119 priv->phyaddr); in fsl_sgmii_riser_fdt_fixup()
/external/u-boot/board/freescale/mpc8536ds/
Dmpc8536ds.c236 tsec_info[num].phyaddr = 0; in board_eth_init()
245 tsec_info[num].phyaddr = 1; in board_eth_init()
/external/u-boot/board/freescale/mpc837xemds/
Dmpc837xemds.c107 tsec_info[num].phyaddr = TSEC1_PHY_ADDR_SGMII; in board_eth_init()
125 tsec_info[num].phyaddr = TSEC2_PHY_ADDR_SGMII; in board_eth_init()
/external/u-boot/drivers/net/fm/
Dfm.h128 int phyaddr; member

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