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Searched refs:pll1_mult (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/drivers/clk/renesas/
Drcar-gen2-cpg.h31 unsigned int pll1_mult; member
Dclk-rcar-gen2.c159 rate = (gen2_clk_get_rate(&parent) * pll_config->pll1_mult) / 2; in gen2_clk_get_rate()
162 core->parent, pll_config->pll1_mult, rate); in gen2_clk_get_rate()
Drcar-gen3-cpg.h40 u8 pll1_mult; member
Dclk-rcar-gen3.c224 rate = gen3_clk_get_rate64(&parent) * pll_config->pll1_mult; in gen3_clk_get_rate64()
228 core->parent, pll_config->pll1_mult, in gen3_clk_get_rate64()