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Searched refs:pll5_tuning_cfg (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-sunxi/
Dclock_sun6i.c189 clrsetbits_le32(&ccm->pll5_tuning_cfg, CCM_PLL5_TUN_LOCK_TIME_MASK | in clock_set_pll5()
/external/u-boot/arch/arm/include/asm/arch-sunxi/
Dclock_sun6i.h134 u32 pll5_tuning_cfg; /* 0x260 PLL5 Tuning config */ member