Searched refs:port_mmio (Results 1 – 4 of 4) sorted by relevance
121 void __iomem *port_mmio = uc_priv->port[port].port_mmio; in ahci_link_up() local129 tmp = readl(port_mmio + PORT_SCR_STAT); in ahci_link_up()141 static void sunxi_dma_init(void __iomem *port_mmio) in sunxi_dma_init() argument143 clrsetbits_le32(port_mmio + PORT_P0DMACR, 0x0000ff00, 0x00004400); in sunxi_dma_init()189 void __iomem *port_mmio; in ahci_host_init() local239 uc_priv->port[i].port_mmio = ahci_port_base(mmio, i); in ahci_host_init()240 port_mmio = (u8 *)uc_priv->port[i].port_mmio; in ahci_host_init()244 tmp = readl(port_mmio + PORT_CMD); in ahci_host_init()250 writel_with_flush(tmp, port_mmio + PORT_CMD); in ahci_host_init()259 sunxi_dma_init(port_mmio); in ahci_host_init()[all …]
116 struct sata_port_regs *port_mmio = NULL; in ahci_host_init() local162 uc_priv->port[i].port_mmio = ahci_port_base(host_mmio, i); in ahci_host_init()163 port_mmio = uc_priv->port[i].port_mmio; in ahci_host_init()166 tmp = readl(&port_mmio->cmd); in ahci_host_init()181 writel_with_flush(tmp, &port_mmio->cmd); in ahci_host_init()190 while ((readl(&port_mmio->cmd) & SATA_PORT_CMD_CR) in ahci_host_init()201 tmp = readl(&port_mmio->cmd); in ahci_host_init()202 writel((tmp | SATA_PORT_CMD_SUD), &port_mmio->cmd); in ahci_host_init()206 while (!(readl(&port_mmio->cmd) | SATA_PORT_CMD_SUD) in ahci_host_init()216 tmp = readl(&port_mmio->ssts); in ahci_host_init()[all …]
178 u8 *port_mmio = (u8 *)probe_ent->port[port].port_mmio; in ahci_link_up() local189 writel(0x301, port_mmio + PORT_SCR_CTL); in ahci_link_up()191 writel(0x300, port_mmio + PORT_SCR_CTL); in ahci_link_up()196 tmp = readl(port_mmio + PORT_SCR_STAT); in ahci_link_up()
139 void __iomem *port_mmio; member