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Searched refs:printSVERegOp (Results 1 – 5 of 5) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/InstPrinter/
DAArch64InstPrinter.h181 void printSVERegOp(const MCInst *MI, unsigned OpNum,
DAArch64InstPrinter.cpp1431 void AArch64InstPrinter::printSVERegOp(const MCInst *MI, unsigned OpNum, in printSVERegOp() function in AArch64InstPrinter
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmWriter1.inc10817 printSVERegOp<'b'>(MI, 0, STI, O);
10821 printSVERegOp<'d'>(MI, 0, STI, O);
10825 printSVERegOp<'h'>(MI, 0, STI, O);
10830 printSVERegOp<'s'>(MI, 0, STI, O);
10892 printSVERegOp<'q'>(MI, 0, STI, O);
10894 printSVERegOp<'q'>(MI, 1, STI, O);
10902 printSVERegOp<>(MI, 1, STI, O);
10908 printSVERegOp<>(MI, 1, STI, O);
10919 printSVERegOp<>(MI, 1, STI, O);
10925 printSVERegOp<>(MI, 1, STI, O);
[all …]
DAArch64GenAsmWriter.inc9868 printSVERegOp<'b'>(MI, 0, STI, O);
9872 printSVERegOp<'d'>(MI, 0, STI, O);
9876 printSVERegOp<'h'>(MI, 0, STI, O);
9881 printSVERegOp<'s'>(MI, 0, STI, O);
9943 printSVERegOp<'q'>(MI, 0, STI, O);
9945 printSVERegOp<'q'>(MI, 1, STI, O);
9953 printSVERegOp<>(MI, 1, STI, O);
9959 printSVERegOp<>(MI, 1, STI, O);
9970 printSVERegOp<>(MI, 1, STI, O);
9976 printSVERegOp<>(MI, 1, STI, O);
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64RegisterInfo.td787 "printSVERegOp<>",
788 "printSVERegOp<'" # Suffix # "'>");