Home
last modified time | relevance | path

Searched refs:ptx (Results 1 – 25 of 140) sorted by relevance

123456

/external/llvm/test/CodeGen/NVPTX/
Denvreg.ll4 declare i32 @llvm.nvvm.read.ptx.sreg.envreg0()
5 declare i32 @llvm.nvvm.read.ptx.sreg.envreg1()
6 declare i32 @llvm.nvvm.read.ptx.sreg.envreg2()
7 declare i32 @llvm.nvvm.read.ptx.sreg.envreg3()
8 declare i32 @llvm.nvvm.read.ptx.sreg.envreg4()
9 declare i32 @llvm.nvvm.read.ptx.sreg.envreg5()
10 declare i32 @llvm.nvvm.read.ptx.sreg.envreg6()
11 declare i32 @llvm.nvvm.read.ptx.sreg.envreg7()
12 declare i32 @llvm.nvvm.read.ptx.sreg.envreg8()
13 declare i32 @llvm.nvvm.read.ptx.sreg.envreg9()
[all …]
Dintrinsic-old.ll11 ; RANGE: call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !range ![[BLK_IDX_XY:[0-9]+]]
13 %x = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
19 ; RANGE: call i32 @llvm.nvvm.read.ptx.sreg.tid.y(), !range ![[BLK_IDX_XY]]
21 %x = call i32 @llvm.nvvm.read.ptx.sreg.tid.y()
27 ; RANGE: call i32 @llvm.nvvm.read.ptx.sreg.tid.z(), !range ![[BLK_IDX_Z:[0-9]+]]
29 %x = call i32 @llvm.nvvm.read.ptx.sreg.tid.z()
36 %x = call i32 @llvm.nvvm.read.ptx.sreg.tid.w()
42 ; RANGE: call i32 @llvm.nvvm.read.ptx.sreg.ntid.x(), !range ![[BLK_SIZE_XY:[0-9]+]]
44 %x = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
50 ; RANGE: call i32 @llvm.nvvm.read.ptx.sreg.ntid.y(), !range ![[BLK_SIZE_XY]]
[all …]
Dbug22322.ll13 %0 = tail call i32 @llvm.nvvm.read.ptx.sreg.ctaid.x()
14 %1 = tail call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
16 %3 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
40 declare i32 @llvm.nvvm.read.ptx.sreg.ctaid.x() #1
43 declare i32 @llvm.nvvm.read.ptx.sreg.ntid.x() #1
46 declare i32 @llvm.nvvm.read.ptx.sreg.tid.x() #1
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/NVPTX/
Denvreg.ll4 declare i32 @llvm.nvvm.read.ptx.sreg.envreg0()
5 declare i32 @llvm.nvvm.read.ptx.sreg.envreg1()
6 declare i32 @llvm.nvvm.read.ptx.sreg.envreg2()
7 declare i32 @llvm.nvvm.read.ptx.sreg.envreg3()
8 declare i32 @llvm.nvvm.read.ptx.sreg.envreg4()
9 declare i32 @llvm.nvvm.read.ptx.sreg.envreg5()
10 declare i32 @llvm.nvvm.read.ptx.sreg.envreg6()
11 declare i32 @llvm.nvvm.read.ptx.sreg.envreg7()
12 declare i32 @llvm.nvvm.read.ptx.sreg.envreg8()
13 declare i32 @llvm.nvvm.read.ptx.sreg.envreg9()
[all …]
Dintrinsic-old.ll11 ; RANGE: call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !range ![[BLK_IDX_XY:[0-9]+]]
13 %x = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
19 ; RANGE: call i32 @llvm.nvvm.read.ptx.sreg.tid.y(), !range ![[BLK_IDX_XY]]
21 %x = call i32 @llvm.nvvm.read.ptx.sreg.tid.y()
27 ; RANGE: call i32 @llvm.nvvm.read.ptx.sreg.tid.z(), !range ![[BLK_IDX_Z:[0-9]+]]
29 %x = call i32 @llvm.nvvm.read.ptx.sreg.tid.z()
36 %x = call i32 @llvm.nvvm.read.ptx.sreg.tid.w()
42 ; RANGE: call i32 @llvm.nvvm.read.ptx.sreg.ntid.x(), !range ![[BLK_SIZE_XY:[0-9]+]]
44 %x = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
50 ; RANGE: call i32 @llvm.nvvm.read.ptx.sreg.ntid.y(), !range ![[BLK_SIZE_XY]]
[all …]
Dbug22322.ll13 %0 = tail call i32 @llvm.nvvm.read.ptx.sreg.ctaid.x()
14 %1 = tail call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
16 %3 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
40 declare i32 @llvm.nvvm.read.ptx.sreg.ctaid.x() #1
43 declare i32 @llvm.nvvm.read.ptx.sreg.ntid.x() #1
46 declare i32 @llvm.nvvm.read.ptx.sreg.tid.x() #1
Dtid-range.ll6 %call = call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !range !0
16 declare i32 @llvm.nvvm.read.ptx.sreg.tid.x()
/external/swiftshader/third_party/LLVM/test/CodeGen/PTX/
Dintrinsic.ll6 %x = call i32 @llvm.ptx.read.tid.x()
13 %x = call i32 @llvm.ptx.read.tid.y()
20 %x = call i32 @llvm.ptx.read.tid.z()
27 %x = call i32 @llvm.ptx.read.tid.w()
34 %x = call i32 @llvm.ptx.read.ntid.x()
41 %x = call i32 @llvm.ptx.read.ntid.y()
48 %x = call i32 @llvm.ptx.read.ntid.z()
55 %x = call i32 @llvm.ptx.read.ntid.w()
62 %x = call i32 @llvm.ptx.read.laneid()
69 %x = call i32 @llvm.ptx.read.warpid()
[all …]
/external/tensorflow/tensorflow/stream_executor/
Dkernel_spec.cc49 CudaPtxInMemory::CudaPtxInMemory(absl::string_view ptx, in CudaPtxInMemory() argument
57 decompressed_ptx_[ptx.data()] = ""; in CudaPtxInMemory()
59 ptx_by_compute_capability_[kMinimumCapability] = ptx.data(); in CudaPtxInMemory()
69 absl::string_view ptx; in CudaPtxInMemory() local
70 std::tie(major, minor, ptx) = spec; in CudaPtxInMemory()
74 decompressed_ptx_[ptx.data()] = ""; in CudaPtxInMemory()
76 ptx_by_compute_capability_[std::tuple<int, int>{major, minor}] = ptx.data(); in CudaPtxInMemory()
80 string CudaPtxInMemory::DecompressPtx(const char *ptx) { in DecompressPtx() argument
82 uint64 ptx_length = *reinterpret_cast<const uint64 *>(ptx); in DecompressPtx()
84 string compressed_ptx(ptx + sizeof(uint64), in DecompressPtx()
[all …]
Dmodule_spec.h50 void AddCudaPtxInMemory(const char* ptx) { in AddCudaPtxInMemory() argument
53 cuda_ptx_in_memory_ = *ptx ? ptx : nullptr; in AddCudaPtxInMemory()
Dkernel_spec.h156 CudaPtxInMemory(absl::string_view ptx, absl::string_view kernelname,
195 static string DecompressPtx(const char *ptx);
343 MultiKernelLoaderSpec *AddCudaPtxInMemory(absl::string_view ptx,
346 absl::string_view ptx, absl::string_view kernelname);
/external/tensorflow/tensorflow/compiler/xla/service/gpu/
Dnvptx_compiler.h101 const string& ptx, int cc_major, int cc_minor,
117 CompilationCacheKey(std::string ptx, int cc_major, int cc_minor) in CompilationCacheKey()
118 : ptx(std::move(ptx)), cc_major(cc_major), cc_minor(cc_minor) {} in CompilationCacheKey()
119 string ptx; member
126 tensorflow::Hash64Combine(tensorflow::Hash64(key.ptx), key.cc_major), in operator()
134 a.ptx == b.ptx; in operator()
Dnvptx_compiler.cc540 const string& ptx, int cc_major, int cc_minor, in CompilePtx() argument
566 TF_RETURN_IF_ERROR(tensorflow::WriteStringToFile(env, ptx_path, ptx)); in CompilePtx()
746 string ptx; in RunBackend() local
749 TF_ASSIGN_OR_RETURN(ptx, CompileToPtx(&llvm_module, {cc_major, cc_minor}, in RunBackend()
760 DumpToFileInDirOrStdout(*module, "ptx", ptx); in RunBackend()
764 CompilePtxOrGetCachedResult(ptx, cc_major, cc_minor, module->config()); in RunBackend()
793 ptx, cubin, {cc_major, cc_minor}, std::move(thunk_schedule), in RunBackend()
804 const string& ptx, int cc_major, int cc_minor, in CompilePtxOrGetCachedResult() argument
819 std::forward_as_tuple(ptx, cc_major, cc_minor), in CompilePtxOrGetCachedResult()
821 cache_ptx = &iter->first.ptx; in CompilePtxOrGetCachedResult()
[all …]
Dgpu_executable.h54 GpuExecutable(const string& ptx, const std::vector<uint8>& cubin,
71 const string& ptx() const { return ptx_; } in ptx() function
Dgpu_executable.cc51 const string& ptx, const std::vector<uint8>& cubin, in GpuExecutable() argument
60 ptx_(ptx), in GpuExecutable()
199 module_spec.AddCudaPtxInMemory(ptx().c_str()); in ResolveConstantGlobals()
/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/DivergenceAnalysis/NVPTX/
Ddiverge.ll10 %tid = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
32 %tid = call i32 @llvm.nvvm.read.ptx.sreg.tid.y()
53 %tid = call i32 @llvm.nvvm.read.ptx.sreg.tid.z()
103 %laneid = call i32 @llvm.nvvm.read.ptx.sreg.laneid()
125 %tid = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
161 %tid = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
192 %tid = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
208 declare i32 @llvm.nvvm.read.ptx.sreg.tid.x()
209 declare i32 @llvm.nvvm.read.ptx.sreg.tid.y()
210 declare i32 @llvm.nvvm.read.ptx.sreg.tid.z()
[all …]
/external/llvm/test/Analysis/DivergenceAnalysis/NVPTX/
Ddiverge.ll10 %tid = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
32 %tid = call i32 @llvm.nvvm.read.ptx.sreg.tid.y()
53 %tid = call i32 @llvm.nvvm.read.ptx.sreg.tid.z()
103 %laneid = call i32 @llvm.nvvm.read.ptx.sreg.laneid()
125 %tid = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
161 %tid = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
192 %tid = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
208 declare i32 @llvm.nvvm.read.ptx.sreg.tid.x()
209 declare i32 @llvm.nvvm.read.ptx.sreg.tid.y()
210 declare i32 @llvm.nvvm.read.ptx.sreg.tid.z()
[all …]
/external/libldac/src/
DldacBT_internal.c306 LDACBT_TX_INFO *ptx; local
315 ptx = &hLdacBT->tx;
361 ptx->nfrm_in_pkt = ptx->tx_size / hLdacBT->frmlen_tx;
362 if( ptx->nfrm_in_pkt > LDACBT_NFRM_TX_MAX ){
363 ptx->nfrm_in_pkt = LDACBT_NFRM_TX_MAX;
365 else if( ptx->nfrm_in_pkt < 2 ){
367 if( frmlen <= (ptx->tx_size / 2 - LDACBT_FRMHDRBYTES)){
370 frmlen = ptx->tx_size / 2 - LDACBT_FRMHDRBYTES;
375 hLdacBT->eqmid = ldacBT_get_eqmid_from_frmlen( frmlen, ch, hLdacBT->transport, ptx->pkt_type );
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DNVPTXUsage.rst196 '``llvm.nvvm.read.ptx.sreg.*``'
204 declare i32 @llvm.nvvm.read.ptx.sreg.tid.x()
205 declare i32 @llvm.nvvm.read.ptx.sreg.tid.y()
206 declare i32 @llvm.nvvm.read.ptx.sreg.tid.z()
207 declare i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
208 declare i32 @llvm.nvvm.read.ptx.sreg.ntid.y()
209 declare i32 @llvm.nvvm.read.ptx.sreg.ntid.z()
210 declare i32 @llvm.nvvm.read.ptx.sreg.ctaid.x()
211 declare i32 @llvm.nvvm.read.ptx.sreg.ctaid.y()
212 declare i32 @llvm.nvvm.read.ptx.sreg.ctaid.z()
[all …]
/external/llvm/docs/
DNVPTXUsage.rst196 '``llvm.nvvm.read.ptx.sreg.*``'
204 declare i32 @llvm.nvvm.read.ptx.sreg.tid.x()
205 declare i32 @llvm.nvvm.read.ptx.sreg.tid.y()
206 declare i32 @llvm.nvvm.read.ptx.sreg.tid.z()
207 declare i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
208 declare i32 @llvm.nvvm.read.ptx.sreg.ntid.y()
209 declare i32 @llvm.nvvm.read.ptx.sreg.ntid.z()
210 declare i32 @llvm.nvvm.read.ptx.sreg.ctaid.x()
211 declare i32 @llvm.nvvm.read.ptx.sreg.ctaid.y()
212 declare i32 @llvm.nvvm.read.ptx.sreg.ctaid.z()
[all …]
/external/tensorflow/tensorflow/compiler/xla/service/gpu/llvm_gpu_backend/
Dnvptx_backend_lib.cc250 std::string ptx; // need a std::string instead of a ::string. in EmitModuleToPTX() local
252 llvm::raw_string_ostream stream(ptx); in EmitModuleToPTX()
267 return ptx; in EmitModuleToPTX()
489 string ptx; in CompileToPtx() local
496 ptx, CompileModuleToPtx(module, compute_capability, hlo_module_config, in CompileToPtx()
499 return ptx; in CompileToPtx()
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InferAddressSpaces/NVPTX/
Dclone_constexpr.ll10 ; CHECK: %x0 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x() #2
20 %x0 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x() #2
32 declare i32 @llvm.nvvm.read.ptx.sreg.tid.x() #1
/external/tensorflow/tensorflow/stream_executor/cuda/
Dcuda_gpu_executor.cc242 bool GpuExecutor::LoadModuleFromPtx(const char* ptx, CUmodule* module) { in LoadModuleFromPtx() argument
244 std::tie(*module, module_refcount) = gpu_binary_to_module_[ptx]; in LoadModuleFromPtx()
247 if (!GpuDriver::LoadPtx(context_, ptx, module)) { in LoadModuleFromPtx()
250 VLOG(3) << "Loaded PTX " << static_cast<const void *>(ptx) << " as module " in LoadModuleFromPtx()
255 VLOG(3) << "PTX " << static_cast<const void *>(ptx) in LoadModuleFromPtx()
258 gpu_binary_to_module_[ptx] = {*module, module_refcount}; in LoadModuleFromPtx()
290 const char *ptx = spec.cuda_ptx_in_memory().text(cc_major_, cc_minor_); in GetKernel() local
291 if (ptx == nullptr) { in GetKernel()
292 ptx = spec.cuda_ptx_in_memory().default_text(); in GetKernel()
294 if (ptx == nullptr) { in GetKernel()
[all …]
/external/swiftshader/third_party/LLVM/include/llvm/
DIntrinsicsPTX.td14 let TargetPrefix = "ptx" in {
90 let TargetPrefix = "ptx" in
/external/mesa3d/src/gallium/drivers/nouveau/nv30/
Dnv30_miptree.c83 nv30_transfer(struct pipe_transfer *ptx) in nv30_transfer() argument
85 return (struct nv30_transfer *)ptx; in nv30_transfer()
337 struct pipe_transfer *ptx) in nv30_miptree_transfer_unmap() argument
340 struct nv30_transfer *tx = nv30_transfer(ptx); in nv30_miptree_transfer_unmap()
342 if (ptx->usage & PIPE_TRANSFER_WRITE) { in nv30_miptree_transfer_unmap()
351 pipe_resource_reference(&ptx->resource, NULL); in nv30_miptree_transfer_unmap()

123456