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Searched refs:push_descriptors (Results 1 – 4 of 4) sorted by relevance

/external/mesa3d/src/intel/vulkan/
Danv_cmd_buffer.c131 for (uint32_t i = 0; i < ARRAY_SIZE(pipe_state->push_descriptors); i++) in anv_cmd_pipeline_state_finish()
132 vk_free(&cmd_buffer->pool->alloc, pipe_state->push_descriptors[i]); in anv_cmd_pipeline_state_finish()
888 &pipe_state->push_descriptors[set]; in anv_cmd_buffer_get_push_descriptor_set()
Danv_private.h1682 struct anv_push_descriptor_set *push_descriptors[MAX_SETS]; member
/external/mesa3d/src/amd/vulkan/
Dradv_cmd_buffer.c264 free(cmd_buffer->push_descriptors.set.mapped_ptr); in radv_cmd_buffer_destroy()
1706 struct radv_descriptor_set *set = &cmd_buffer->push_descriptors.set; in radv_flush_push_descriptors()
2490 if (cmd_buffer->push_descriptors.capacity < set->size) { in radv_init_push_descriptor_set()
2492 new_size = MAX2(new_size, 2 * cmd_buffer->push_descriptors.capacity); in radv_init_push_descriptor_set()
2499 cmd_buffer->push_descriptors.capacity = 0; in radv_init_push_descriptor_set()
2504 cmd_buffer->push_descriptors.capacity = new_size; in radv_init_push_descriptor_set()
2553 struct radv_descriptor_set *push_set = &cmd_buffer->push_descriptors.set; in radv_CmdPushDescriptorSetKHR()
2577 struct radv_descriptor_set *push_set = &cmd_buffer->push_descriptors.set; in radv_CmdPushDescriptorSetWithTemplateKHR()
Dradv_private.h973 struct radv_push_descriptor_set push_descriptors; member