| /external/u-boot/doc/device-tree-bindings/pwm/ |
| D | pwm.txt | 8 with a property containing a 'pwm-list':
10 pwm-list ::= <single-pwm> [pwm-list]
11 single-pwm ::= <pwm-phandle> <pwm-specifier>
12 pwm-phandle : phandle to PWM controller node
13 pwm-specifier : array of #pwm-cells specifying the given PWM
18 An optional property "pwm-names" may contain a list of strings to label
19 each of the PWM devices listed in the "pwms" property. If no "pwm-names"
23 "pwm-names" property to map the name of the PWM device requested by the
29 pwm: pwm {
30 #pwm-cells = <2>;
[all …]
|
| D | tegra20-pwm.txt | 5 - "nvidia,tegra20-pwm"
6 - "nvidia,tegra30-pwm"
8 - #pwm-cells: On Tegra the number of cells used to specify a PWM is 2. The
14 pwm: pwm@7000a000 {
15 compatible = "nvidia,tegra20-pwm";
17 #pwm-cells = <2>;
|
| /external/u-boot/arch/arm/cpu/armv7/s5p-common/ |
| D | pwm.c | 17 const struct s5p_timer *pwm = in pwm_enable() local
21 tcon = readl(&pwm->tcon); in pwm_enable()
24 writel(tcon, &pwm->tcon); in pwm_enable()
31 const struct s5p_timer *pwm = in pwm_disable() local
35 tcon = readl(&pwm->tcon); in pwm_disable()
38 writel(tcon, &pwm->tcon); in pwm_disable()
60 const struct s5p_timer *pwm = in pwm_config() local
96 writel(tcnt, &pwm->tcntb0 + offset); in pwm_config()
97 writel(tcmp, &pwm->tcmpb0 + offset); in pwm_config()
100 tcon = readl(&pwm->tcon); in pwm_config()
[all …]
|
| /external/u-boot/drivers/pwm/ |
| D | pwm-imx.c | 18 struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id); in pwm_init() local
20 if (!pwm) in pwm_init()
23 writel(0, &pwm->ir); in pwm_init()
29 struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id); in pwm_config() local
33 if (!pwm) in pwm_config()
43 writel(cr, &pwm->cr); in pwm_config()
45 writel(duty_cycles, &pwm->sar); in pwm_config()
47 writel(period_cycles, &pwm->pr); in pwm_config()
53 struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id); in pwm_enable() local
55 if (!pwm) in pwm_enable()
[all …]
|
| D | Makefile | 11 obj-$(CONFIG_DM_PWM) += pwm-uclass.o
14 obj-$(CONFIG_PWM_IMX) += pwm-imx.o pwm-imx-util.o
|
| /external/u-boot/drivers/video/exynos/ |
| D | exynos_pwm_bl.c | 19 static struct pwm_backlight_data *pwm; variable
23 int brightness = pwm->brightness; in exynos_pwm_backlight_update_status()
24 int max = pwm->max_brightness; in exynos_pwm_backlight_update_status()
27 pwm_config(pwm->pwm_id, 0, pwm->period); in exynos_pwm_backlight_update_status()
28 pwm_disable(pwm->pwm_id); in exynos_pwm_backlight_update_status()
30 pwm_config(pwm->pwm_id, in exynos_pwm_backlight_update_status()
31 brightness * pwm->period / max, pwm->period); in exynos_pwm_backlight_update_status()
32 pwm_enable(pwm->pwm_id); in exynos_pwm_backlight_update_status()
39 pwm = pd; in exynos_pwm_backlight_init()
|
| /external/u-boot/arch/arm/dts/ |
| D | rk3036.dtsi | 149 pwm0: pwm@20050000 {
150 compatible = "rockchip,rk2928-pwm";
152 #pwm-cells = <3>;
156 clock-names = "pwm";
160 pwm1: pwm@20050010 {
161 compatible = "rockchip,rk2928-pwm";
163 #pwm-cells = <3>;
167 clock-names = "pwm";
171 pwm2: pwm@20050020 {
172 compatible = "rockchip,rk2928-pwm";
[all …]
|
| D | stm32f429.dtsi | 94 pwm {
95 compatible = "st,stm32-pwm";
123 pwm {
124 compatible = "st,stm32-pwm";
152 pwm {
153 compatible = "st,stm32-pwm";
180 pwm {
181 compatible = "st,stm32-pwm";
249 pwm {
250 compatible = "st,stm32-pwm";
[all …]
|
| D | imx6ul.dtsi | 335 pwm1: pwm@02080000 {
336 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
342 #pwm-cells = <2>;
346 pwm2: pwm@02084000 {
347 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
353 #pwm-cells = <2>;
357 pwm3: pwm@02088000 {
358 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
364 #pwm-cells = <2>;
368 pwm4: pwm@0208c000 {
[all …]
|
| D | tegra20-medcom-wide.dts | 43 pwm: pwm@7000a000 { label
59 nvidia,pwm = <&pwm 0 500000>;
|
| D | imx6ull.dtsi | 427 pwm1: pwm@02080000 {
428 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
434 #pwm-cells = <2>;
437 pwm2: pwm@02084000 {
438 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
444 #pwm-cells = <2>;
447 pwm3: pwm@02088000 {
448 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
454 #pwm-cells = <2>;
457 pwm4: pwm@0208c000 {
[all …]
|
| D | tegra20-tec.dts | 55 pwm: pwm@7000a000 { label
71 nvidia,pwm = <&pwm 0 500000>;
|
| D | meson-gx.dtsi | 223 pwm_ab: pwm@8550 {
224 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
226 #pwm-cells = <3>;
230 pwm_cd: pwm@8650 {
231 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
233 #pwm-cells = <3>;
245 pwm_ef: pwm@86c0 {
246 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
248 #pwm-cells = <3>;
392 pwm_AO_ab: pwm@550 {
[all …]
|
| D | rk3xxx.dtsi | 273 pwm0: pwm@20030000 {
274 compatible = "rockchip,rk2928-pwm";
276 #pwm-cells = <2>;
281 pwm1: pwm@20030010 {
282 compatible = "rockchip,rk2928-pwm";
284 #pwm-cells = <2>;
297 pwm2: pwm@20050020 {
298 compatible = "rockchip,rk2928-pwm";
300 #pwm-cells = <2>;
305 pwm3: pwm@20050030 {
[all …]
|
| D | imx6sx.dtsi | 373 pwm1: pwm@02080000 {
374 compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
380 #pwm-cells = <2>;
383 pwm2: pwm@02084000 {
384 compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
390 #pwm-cells = <2>;
393 pwm3: pwm@02088000 {
394 compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
400 #pwm-cells = <2>;
403 pwm4: pwm@0208c000 {
[all …]
|
| D | exynos5250.dtsi | 118 pwm: pwm@12dd0000 { label
119 compatible = "samsung,exynos4210-pwm";
121 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
122 #pwm-cells = <3>;
|
| D | exynos54xx.dtsi | 177 samsung,pwm-out-gpio = <&gpb2 0 GPIO_ACTIVE_HIGH>;
199 pwm: pwm@12dd0000 { label
200 compatible = "samsung,exynos4210-pwm";
202 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
203 #pwm-cells = <3>;
|
| D | rk3128.dtsi | 315 compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
317 #pwm-cells = <3>;
321 clock-names = "pwm";
325 compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
327 #pwm-cells = <3>;
331 clock-names = "pwm";
335 compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
337 #pwm-cells = <3>;
341 clock-names = "pwm";
345 compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
[all …]
|
| D | rk322x.dtsi | 267 pwm0: pwm@110b0000 {
268 compatible = "rockchip,rk3288-pwm";
270 #pwm-cells = <3>;
272 clock-names = "pwm";
278 pwm1: pwm@110b0010 {
279 compatible = "rockchip,rk3288-pwm";
281 #pwm-cells = <3>;
283 clock-names = "pwm";
289 pwm2: pwm@110b0020 {
290 compatible = "rockchip,rk3288-pwm";
[all …]
|
| D | r8a77995.dtsi | 603 pwm0: pwm@e6e30000 {
604 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
606 #pwm-cells = <2>;
613 pwm1: pwm@e6e31000 {
614 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
616 #pwm-cells = <2>;
623 pwm2: pwm@e6e32000 {
624 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
626 #pwm-cells = <2>;
633 pwm3: pwm@e6e33000 {
[all …]
|
| D | rk3368.dtsi | 591 pwm0: pwm@ff680000 {
592 compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm";
594 #pwm-cells = <3>;
598 clock-names = "pwm";
602 pwm1: pwm@ff680010 {
603 compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm";
605 #pwm-cells = <3>;
609 clock-names = "pwm";
613 pwm2: pwm@ff680020 {
614 compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm";
[all …]
|
| D | rk3399-evb.dts | 7 #include <dt-bindings/pwm/pwm.h>
24 compatible = "pwm-regulator";
84 compatible = "pwm-backlight";
124 pwm-delay-us = <10000>;
|
| /external/u-boot/doc/device-tree-bindings/video/ |
| D | tegra20-dc.txt | 25 - nvidia,pwm : pwm to use to set display contrast (see tegra20-pwm.txt)
30 * delay between backlight_vdd and pwm-rise
31 * delay between pwm-rise and backlight_en-rise
79 nvidia,pwm = <&pwm 2 0>;
|
| /external/u-boot/drivers/power/regulator/ |
| D | pwm_regulator.c | 29 struct udevice *pwm; member
44 return pwm_set_enable(priv->pwm, priv->pwm_id, enable); in pwm_regulator_enable()
72 ret = pwm_set_invert(priv->pwm, priv->pwm_id, priv->polarity); in pwm_regulator_set_voltage()
78 ret = pwm_set_config(priv->pwm, priv->pwm_id, in pwm_regulator_set_voltage()
111 ret = uclass_get_device_by_ofnode(UCLASS_PWM, args.node, &priv->pwm); in pwm_regulator_ofdata_to_platdata()
|
| /external/u-boot/drivers/video/ |
| D | pwm_backlight.c | 17 struct udevice *pwm; member
47 ret = pwm_set_config(priv->pwm, priv->channel, priv->period_ns, in pwm_backlight_enable()
51 ret = pwm_set_enable(priv->pwm, priv->channel, true); in pwm_backlight_enable()
87 ret = uclass_get_device_by_ofnode(UCLASS_PWM, args.node, &priv->pwm); in pwm_backlight_ofdata_to_platdata()
|