| /external/boringssl/ios-arm/crypto/fipsmodule/ |
| D | sha1-armv4-large.S | 45 stmdb sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
59 ldrb r11,[r1,#1]
64 orr r9,r9,r11,lsl#16
84 ldrb r11,[r1,#1]
89 orr r9,r9,r11,lsl#16
109 ldrb r11,[r1,#1]
114 orr r9,r9,r11,lsl#16
134 ldrb r11,[r1,#1]
139 orr r9,r9,r11,lsl#16
159 ldrb r11,[r1,#1]
[all …]
|
| /external/boringssl/linux-arm/crypto/fipsmodule/ |
| D | sha1-armv4-large.S | 44 stmdb sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
58 ldrb r11,[r1,#1]
63 orr r9,r9,r11,lsl#16
83 ldrb r11,[r1,#1]
88 orr r9,r9,r11,lsl#16
108 ldrb r11,[r1,#1]
113 orr r9,r9,r11,lsl#16
133 ldrb r11,[r1,#1]
138 orr r9,r9,r11,lsl#16
158 ldrb r11,[r1,#1]
[all …]
|
| /external/libxaac/decoder/armv7/ |
| D | ixheaacd_tns_ar_filter_fixed_32x16.s | 77 MOV r11 , #0
83 SMLAWB r11 , r10, r9, r11
87 SUB r8 , r8 , r11, lsl #1
111 MOV r11 , #0
119 SMLAWB r11, r10 , r9, r11
123 SMLAWT r11, r2 , r9, r11
127 SMLAWB r11, r10 , r9, r11
131 SMLAWT r11, r2 , r9, r11
136 SUB r8 , r8 , r11, lsl #1
155 MOV r11 , #0
[all …]
|
| D | ixheaacd_autocorr_st2.s | 56 SMULWT r11, r4 , r4
58 SMLAWT r11, r5 , r5, r11
92 SMLAWT r11, r4 , r4, r11
94 SMLAWT r11, r5 , r5, r11
108 SMLAWT r11, r6 , r6, r11
110 SMLAWT r11, r7 , r7, r11
128 SMLAWT r11, r4 , r4, r11
130 SMLAWT r11, r5 , r5, r11
144 MOV r12, r11
167 SMLAWT r11, r4, r4, r11
[all …]
|
| D | ixheaacd_decorr_filter2.s | 36 MOV r11, #384
41 MLA r4, r11, r4, r12
43 MLA r5, r11, r5, r12
45 MLA r6, r11, r6, r12
48 ADD r11, r9, #0x0150
61 ADD r11, r11, #0x0c
65 ADD r12, r11, #0x0a0
68 SUB r10, r11, #0x03A
127 ADD r11, r11, #12
141 LDR r8, [r11], #4
[all …]
|
| /external/tremolo/Tremolo/ |
| D | mdctARM.s | 188 STMFD r13!,{r4,r6-r11,r14}
198 LDR r11,[r9],#4 @ r11= *wL++
203 SMULL r14,r11,r12,r11 @ (r14,r11) = *l * *wL++
205 ADD r6, r6, r11
216 LDMFD r13!,{r4,r6-r11,PC}
227 STMFD r13!,{r4,r6-r11,r14}
237 LDR r11,[r9],#4 @ r11= *wL++
242 SMULL r14,r11,r12,r11 @ (r14,r11) = *l * *wL++
244 SUB r6, r6, r11
255 LDMFD r13!,{r4,r6-r11,PC}
[all …]
|
| D | mdctLARM.s | 186 STMFD r13!,{r4,r6-r11,r14}
198 LDRB r11,[r9],#1 @ r11= *wL++
202 MUL r11,r12,r11 @ r11 = *l * *wL++
204 MLA r6, r7, r6, r11 @ r6 = *--r * *--wR
215 LDMFD r13!,{r4,r6-r11,PC}
226 STMFD r13!,{r4,r6-r11,r14}
237 LDRB r11,[r9],#1 @ r11= *wL++
242 MUL r11,r12,r11 @ (r14,r11) = *l * *wL++
245 SUB r6, r6, r11
256 LDMFD r13!,{r4,r6-r11,PC}
[all …]
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-rd-rn-rm-a32.cc | 101 {{r2, r11, r11}, false, al, "r2 r11 r11", "r2_r11_r11"},
104 {{r3, r14, r11}, false, al, "r3 r14 r11", "r3_r14_r11"},
119 {{r11, r12, r2}, false, al, "r11 r12 r2", "r11_r12_r2"},
123 {{r11, r8, r9}, false, al, "r11 r8 r9", "r11_r8_r9"},
124 {{r6, r3, r11}, false, al, "r6 r3 r11", "r6_r3_r11"},
132 {{r8, r11, r0}, false, al, "r8 r11 r0", "r8_r11_r0"},
137 {{r3, r11, r7}, false, al, "r3 r11 r7", "r3_r11_r7"},
140 {{r13, r11, r11}, false, al, "r13 r11 r11", "r13_r11_r11"},
158 {{r5, r6, r11}, false, al, "r5 r6 r11", "r5_r6_r11"},
169 {{r14, r11, r0}, false, al, "r14 r11 r0", "r14_r11_r0"},
[all …]
|
| D | test-assembler-rd-rn-rm-t32.cc | 101 {{r2, r11, r11}, false, al, "r2 r11 r11", "r2_r11_r11"},
104 {{r3, r14, r11}, false, al, "r3 r14 r11", "r3_r14_r11"},
119 {{r11, r12, r2}, false, al, "r11 r12 r2", "r11_r12_r2"},
123 {{r11, r8, r9}, false, al, "r11 r8 r9", "r11_r8_r9"},
124 {{r6, r3, r11}, false, al, "r6 r3 r11", "r6_r3_r11"},
132 {{r8, r11, r0}, false, al, "r8 r11 r0", "r8_r11_r0"},
137 {{r3, r11, r7}, false, al, "r3 r11 r7", "r3_r11_r7"},
140 {{r13, r11, r11}, false, al, "r13 r11 r11", "r13_r11_r11"},
158 {{r5, r6, r11}, false, al, "r5 r6 r11", "r5_r6_r11"},
169 {{r14, r11, r0}, false, al, "r14 r11 r0", "r14_r11_r0"},
[all …]
|
| D | test-assembler-cond-rd-rn-operand-rm-rd-is-rn-in-it-block-t32.cc | 96 {{mi, r11, r11, r4}, true, mi, "mi r11 r11 r4", "mi_r11_r11_r4"},
100 {{vc, r11, r11, r0}, true, vc, "vc r11 r11 r0", "vc_r11_r11_r0"},
101 {{le, r6, r6, r11}, true, le, "le r6 r6 r11", "le_r6_r6_r11"},
104 {{hi, r11, r11, r1}, true, hi, "hi r11 r11 r1", "hi_r11_r11_r1"},
105 {{cc, r0, r0, r11}, true, cc, "cc r0 r0 r11", "cc_r0_r0_r11"},
108 {{gt, r14, r14, r11}, true, gt, "gt r14 r14 r11", "gt_r14_r14_r11"},
114 {{ls, r14, r14, r11}, true, ls, "ls r14 r14 r11", "ls_r14_r14_r11"},
118 {{le, r11, r11, r4}, true, le, "le r11 r11 r4", "le_r11_r11_r4"},
131 {{lt, r2, r2, r11}, true, lt, "lt r2 r2 r11", "lt_r2_r2_r11"},
134 {{vs, r13, r13, r11}, true, vs, "vs r13 r13 r11", "vs_r13_r13_r11"},
[all …]
|
| D | test-assembler-cond-rd-rn-operand-rm-shift-rs-a32.cc | 121 {{cc, r11, r4, r13, ROR, r8},
126 {{al, r13, r11, r3, ROR, r4},
131 {{gt, r11, r5, r4, LSR, r11},
156 {{mi, r3, r13, r0, ROR, r11},
176 {{le, r11, r13, r3, ROR, r6},
206 {{ls, r13, r5, r11, ROR, r8},
211 {{vc, r11, r10, r11, LSL, r9},
251 {{mi, r11, r5, r1, LSL, r13},
261 {{ls, r6, r11, r4, ASR, r11},
266 {{hi, r11, r12, r4, LSR, r13},
[all …]
|
| D | test-macro-assembler-cond-rd-rn-a32.cc | 96 {{lt, r11, r10}, "lt, r11, r10", "lt_r11_r10"},
101 {{vc, r7, r11}, "vc, r7, r11", "vc_r7_r11"},
105 {{le, r1, r11}, "le, r1, r11", "le_r1_r11"},
108 {{cs, r2, r11}, "cs, r2, r11", "cs_r2_r11"},
124 {{cs, r11, r3}, "cs, r11, r3", "cs_r11_r3"},
128 {{al, r14, r11}, "al, r14, r11", "al_r14_r11"},
138 {{vs, r11, r2}, "vs, r11, r2", "vs_r11_r2"},
139 {{ls, r11, r0}, "ls, r11, r0", "ls_r11_r0"},
144 {{vs, r4, r11}, "vs, r4, r11", "vs_r4_r11"},
150 {{hi, r11, r11}, "hi, r11, r11", "hi_r11_r11"},
[all …]
|
| D | test-macro-assembler-cond-rd-rn-t32.cc | 96 {{lt, r11, r10}, "lt, r11, r10", "lt_r11_r10"},
101 {{vc, r7, r11}, "vc, r7, r11", "vc_r7_r11"},
105 {{le, r1, r11}, "le, r1, r11", "le_r1_r11"},
108 {{cs, r2, r11}, "cs, r2, r11", "cs_r2_r11"},
124 {{cs, r11, r3}, "cs, r11, r3", "cs_r11_r3"},
128 {{al, r14, r11}, "al, r14, r11", "al_r14_r11"},
138 {{vs, r11, r2}, "vs, r11, r2", "vs_r11_r2"},
139 {{ls, r11, r0}, "ls, r11, r0", "ls_r11_r0"},
144 {{vs, r4, r11}, "vs, r4, r11", "vs_r4_r11"},
150 {{hi, r11, r11}, "hi, r11, r11", "hi_r11_r11"},
[all …]
|
| D | test-assembler-cond-rd-rn-rm-a32.cc | 158 {{le, r11, r6, r2}, false, al, "le r11 r6 r2", "le_r11_r6_r2"},
172 {{ge, r4, r13, r11}, false, al, "ge r4 r13 r11", "ge_r4_r13_r11"},
182 {{cs, r14, r11, r13}, false, al, "cs r14 r11 r13", "cs_r14_r11_r13"},
192 {{hi, r11, r5, r9}, false, al, "hi r11 r5 r9", "hi_r11_r5_r9"},
195 {{al, r5, r4, r11}, false, al, "al r5 r4 r11", "al_r5_r4_r11"},
196 {{pl, r11, r11, r2}, false, al, "pl r11 r11 r2", "pl_r11_r11_r2"},
201 {{cs, r3, r11, r10}, false, al, "cs r3 r11 r10", "cs_r3_r11_r10"},
202 {{ls, r11, r4, r0}, false, al, "ls r11 r4 r0", "ls_r11_r4_r0"},
203 {{hi, r11, r8, r9}, false, al, "hi r11 r8 r9", "hi_r11_r8_r9"},
209 {{vc, r8, r11, r6}, false, al, "vc r8 r11 r6", "vc_r8_r11_r6"},
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/ |
| D | frame-09.ll | 1 ; Test the handling of the frame pointer (%r11).
5 ; We should always initialise %r11 when FP elimination is disabled.
10 ; CHECK: stmg %r11, %r15, 88(%r15)
11 ; CHECK: .cfi_offset %r11, -72
14 ; CHECK: lgr %r11, %r15
15 ; CHECK: .cfi_def_cfa_register %r11
16 ; CHECK: lmg %r11, %r15, 88(%r11)
23 ; to %r11 rather than %r15.
26 ; CHECK: stmg %r11, %r15, 88(%r15)
27 ; CHECK: .cfi_offset %r11, -72
[all …]
|
| /external/llvm/test/CodeGen/SystemZ/ |
| D | frame-09.ll | 1 ; Test the handling of the frame pointer (%r11).
5 ; We should always initialise %r11 when FP elimination is disabled.
10 ; CHECK: stmg %r11, %r15, 88(%r15)
11 ; CHECK: .cfi_offset %r11, -72
14 ; CHECK: lgr %r11, %r15
15 ; CHECK: .cfi_def_cfa_register %r11
16 ; CHECK: lmg %r11, %r15, 88(%r11)
23 ; to %r11 rather than %r15.
26 ; CHECK: stmg %r11, %r15, 88(%r15)
27 ; CHECK: .cfi_offset %r11, -72
[all …]
|
| /external/boringssl/src/util/fipstools/delocate/testdata/x86_64-GOTRewrite/ |
| D | out.s | 9 # WAS leaq OPENSSL_ia32cap_P(%rip), %r11
12 leaq OPENSSL_ia32cap_addr_delta(%rip), %r11
13 addq (%r11), %r11
68 # WAS movq stderr@GOTPCREL(%rip), %r11
71 leaq stderr_GOTPCREL_external(%rip), %r11
72 addq (%r11), %r11
73 movq (%r11), %r11
76 # WAS movq foo@GOTPCREL(%rip), %r11
77 leaq .Lfoo_local_target(%rip), %r11
98 # WAS cmoveq stderr@GOTPCREL(%rip), %r11
[all …]
|
| /external/libhevc/common/arm/ |
| D | ihevc_intra_pred_chroma_ver.s | 124 lsl r11, r3, #2
126 add r11, r11, #0xfffffff0
134 vst2.8 {d22,d23}, [r2], r11
135 vst2.8 {d22,d23}, [r5], r11
136 vst2.8 {d22,d23}, [r8], r11
137 vst2.8 {d22,d23}, [r10], r11
147 vst2.8 {d22,d23}, [r2], r11
148 vst2.8 {d22,d23}, [r5], r11
149 vst2.8 {d22,d23}, [r8], r11
150 vst2.8 {d22,d23}, [r10], r11
[all …]
|
| /external/libffi/src/microblaze/ |
| D | sysv.S | 118 rsubi r11, r22, FFI_TYPE_STRUCT
119 beqi r11, ffi_call_SYSV_end
122 rsubi r11, r23, 1
123 beqi r11, ffi_call_SYSV_store8
126 rsubi r11, r23, 2
127 beqi r11, ffi_call_SYSV_store16
130 rsubi r11, r23, 4
131 beqi r11, ffi_call_SYSV_store32
134 rsubi r11, r23, 8
135 beqi r11, ffi_call_SYSV_store64
[all …]
|
| /external/python/cpython2/Modules/_ctypes/libffi/src/microblaze/ |
| D | sysv.S | 118 rsubi r11, r22, FFI_TYPE_STRUCT
119 beqi r11, ffi_call_SYSV_end
122 rsubi r11, r23, 1
123 beqi r11, ffi_call_SYSV_store8
126 rsubi r11, r23, 2
127 beqi r11, ffi_call_SYSV_store16
130 rsubi r11, r23, 4
131 beqi r11, ffi_call_SYSV_store32
134 rsubi r11, r23, 8
135 beqi r11, ffi_call_SYSV_store64
[all …]
|
| /external/boringssl/mac-x86_64/crypto/fipsmodule/ |
| D | x86_64-mont5.S | 29 leaq _OPENSSL_ia32cap_P(%rip),%r11
30 movl 8(%r11),%r11d
50 movq %rsp,%r11
63 subq %r10,%r11
64 andq $-4096,%r11
65 leaq (%r10,%r11,1),%rsp
66 movq (%rsp),%r11
73 movq (%rsp),%r11
226 movq %rdx,%r11
242 addq %r11,%r13
[all …]
|
| /external/boringssl/linux-x86_64/crypto/fipsmodule/ |
| D | x86_64-mont5.S | 30 leaq OPENSSL_ia32cap_P(%rip),%r11
31 movl 8(%r11),%r11d
51 movq %rsp,%r11
64 subq %r10,%r11
65 andq $-4096,%r11
66 leaq (%r10,%r11,1),%rsp
67 movq (%rsp),%r11
74 movq (%rsp),%r11
227 movq %rdx,%r11
243 addq %r11,%r13
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | float-helpers.s | 42 ; CHECK-SOFT: .save {r11, lr}
43 ; CHECK-SOFT-NEXT: push {r11, lr}
45 ; CHECK-SOFT-NEXT: pop {r11, lr}
65 ; CHECK-SOFT: .save {r11, lr}
66 ; CHECK-SOFT-NEXT: push {r11, lr}
68 ; CHECK-SOFT-NEXT: pop {r11, lr}
88 ; CHECK-SOFT: .save {r11, lr}
89 ; CHECK-SOFT-NEXT: push {r11, lr}
91 ; CHECK-SOFT-NEXT: pop {r11, lr}
111 ; CHECK-SOFT: .save {r11, lr}
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | shadow-call-stack.mir | 38 ; CHECK-NEXT: $r11 = XOR64rr undef $r11, undef $r11, implicit-def $eflags
39 ; CHECK-NEXT: ADD64mi8 $r11, 1, $noreg, 0, $gs, 8, implicit-def $eflags
40 ; CHECK-NEXT: $r11 = MOV64rm $r11, 1, $noreg, 0, $gs
41 ; CHECK-NEXT: MOV64mr $r11, 1, $noreg, 0, $gs, $r10
45 ; CHECK-NEXT: $r11 = XOR64rr undef $r11, undef $r11, implicit-def $eflags
46 ; CHECK-NEXT: $r10 = MOV64rm $r11, 1, $noreg, 0, $gs
48 ; CHECK-NEXT: SUB64mi8 $r11, 1, $noreg, 0, $gs, 8, implicit-def $eflags
133 ; CHECK-NEXT: $r11 = XOR64rr undef $r11, undef $r11, implicit-def $eflags
134 ; CHECK-NEXT: ADD64mi8 $r11, 1, $noreg, 0, $gs, 8, implicit-def $eflags
135 ; CHECK-NEXT: $r11 = MOV64rm $r11, 1, $noreg, 0, $gs
[all …]
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| /external/llvm/test/CodeGen/ARM/ |
| D | ehabi.ll | 158 ; CHECK-FP: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
159 ; CHECK-FP: push {r4, r5, r6, r7, r8, r9, r10, r11, lr}
160 ; CHECK-FP: .setfp r11, sp, #28
161 ; CHECK-FP: add r11, sp, #28
170 ; CHECK-FP-ELIM: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
171 ; CHECK-FP-ELIM: push {r4, r5, r6, r7, r8, r9, r10, r11, lr}
180 ; CHECK-V7-FP: .save {r4, r10, r11, lr}
181 ; CHECK-V7-FP: push {r4, r10, r11, lr}
182 ; CHECK-V7-FP: .setfp r11, sp, #8
183 ; CHECK-V7-FP: add r11, sp, #8
[all …]
|