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/external/google-breakpad/src/processor/testdata/symbols/microdump/breakpad_unittests/D6D1FEC9A15DE7F38A236898871A2E770/
Dbreakpad_unittests.sym58084 STACK CFI INIT 2351c 4 .cfa: sp 0 + .ra: x30
58085 STACK CFI INIT 23520 4 .cfa: sp 0 + .ra: x30
58086 STACK CFI INIT 23524 8 .cfa: sp 0 + .ra: x30
58087 STACK CFI INIT 2352c 8 .cfa: sp 0 + .ra: x30
58088 STACK CFI INIT 23534 8 .cfa: sp 0 + .ra: x30
58089 STACK CFI INIT 2353c 8 .cfa: sp 0 + .ra: x30
58090 STACK CFI INIT 23544 8 .cfa: sp 0 + .ra: x30
58091 STACK CFI INIT 2354c 8 .cfa: sp 0 + .ra: x30
58092 STACK CFI INIT 23554 4 .cfa: sp 0 + .ra: x30
58093 STACK CFI INIT 23558 8 .cfa: sp 0 + .ra: x30
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/llvm-ir/
Dand.ll36 ; MIPS-NEXT: jr $ra
41 ; MIPS32R2-NEXT: jr $ra
46 ; MIPS32R6-NEXT: jr $ra
52 ; MIPS64-NEXT: jr $ra
58 ; MIPS64R2-NEXT: jr $ra
64 ; MIPS64R6-NEXT: jr $ra
71 ; MM32R3-NEXT: jrc $ra
76 ; MM32R6-NEXT: jrc $ra
85 ; MIPS-NEXT: jr $ra
90 ; MIPS32R2-NEXT: jr $ra
[all …]
Dor.ll23 ; GP32-NEXT: jr $ra
29 ; GP64-NEXT: jr $ra
36 ; MM32-NEXT: jrc $ra
41 ; MM32R6-NEXT: jrc $ra
50 ; GP32-NEXT: jr $ra
56 ; GP64-NEXT: jr $ra
63 ; MM32-NEXT: jrc $ra
68 ; MM32R6-NEXT: jrc $ra
77 ; GP32-NEXT: jr $ra
83 ; GP64-NEXT: jr $ra
[all …]
Dxor.ll34 ; MIPS-NEXT: jr $ra
39 ; MIPS32R2-NEXT: jr $ra
44 ; MIPS32R6-NEXT: jr $ra
50 ; MIPS64-NEXT: jr $ra
56 ; MIPS64R2-NEXT: jr $ra
62 ; MIPS64R6-NEXT: jr $ra
69 ; MM32R3-NEXT: jrc $ra
74 ; MM32R6-NEXT: jrc $ra
83 ; MIPS-NEXT: jr $ra
88 ; MIPS32R2-NEXT: jr $ra
[all …]
Dret.ll23 ; Force the delay slot filler off to check that the sequence jr $ra; nop is
24 ; turned into jic 0, $ra.
31 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
32 ; R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JALR
33 ; R6C-DAG: jrc $ra # <MCInst #{{[0-9]+}} JIC
42 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
43 ; R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JALR
52 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
53 ; R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JALR
62 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
[all …]
/external/google-breakpad/src/processor/testdata/symbols/microdump/breakpad_unittests/DA7778FB66018A4E9B4110ED06E730D00/
Dbreakpad_unittests.sym55150 STACK CFI INIT 15dc4 2 .cfa: sp 0 + .ra: lr
55151 STACK CFI INIT 15dc6 2 .cfa: sp 0 + .ra: lr
55152 STACK CFI INIT 15dc8 4 .cfa: sp 0 + .ra: lr
55153 STACK CFI INIT 15dcc 4 .cfa: sp 0 + .ra: lr
55154 STACK CFI INIT 15dd0 4 .cfa: sp 0 + .ra: lr
55155 STACK CFI INIT 15dd4 4 .cfa: sp 0 + .ra: lr
55156 STACK CFI INIT 15dd8 4 .cfa: sp 0 + .ra: lr
55157 STACK CFI INIT 15ddc 6 .cfa: sp 0 + .ra: lr
55158 STACK CFI INIT 15de2 2 .cfa: sp 0 + .ra: lr
55159 STACK CFI INIT 15dc8 4 .cfa: sp 0 + .ra: lr
[all …]
/external/cldr/tools/cldr-unittest/src/org/unicode/cldr/unittest/data/transformtest/
Dund-Latn-t-und-guru.txt11 ਅਕਲਸੀਮਾਰ akalasīmāra
15 ਅਕਾਲਬੀਰ akālabīra
20 ਅਜ੍ਮੀਨ੍ਦੇਰ ajmīndēra
21 ਅਝਾਦਬੀਰ ajhādabīra
24 ਅਤੀਨ੍ਦੇਰ atīndēra
28 ਅਨਂਤਵੀਰ anantavīra
40 ਅਨੂਪਬੀਰ anūpabīra
43 ਅਪ੍ਰੀਨਦੇਰ aprīnadēra
56 ਅਮਾਨੀਨ੍ਦੇਰ amānīndēra
59 ਅਮਾਰ੍ਬੀਰ amārbīra
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/
Dmemory-offsets.s9 …lw $31, ($29) # CHECK: lw $ra, 0($sp) # encoding: [0x8f,0xbf,0x00,0x00]
10 …lw $31, 0($29) # CHECK: lw $ra, 0($sp) # encoding: [0x8f,0xbf,0x00,0x00]
11 …lw $31, (8)($29) # CHECK: lw $ra, 8($sp) # encoding: [0x8f,0xbf,0x00,0x08]
12 …lw $31, 3 + (4 * 8)($29) # CHECK: lw $ra, 35($sp) # encoding: [0x8f,0xbf,0x00,0x23]
13 …lw $31, (8 + 8)($29) # CHECK: lw $ra, 16($sp) # encoding: [0x8f,0xbf,0x00,0x10]
14 …lw $31, (8 << 4)($29) # CHECK: lw $ra, 128($sp) # encoding: [0x8f,0xbf,0x00,0x80]
15 …lw $31, (32768 >> 2)($29) # CHECK: lw $ra, 8192($sp) # encoding: [0x8f,0xbf,0x20,0x00]
16 …lw $31, 32768 >> 2($29) # CHECK: lw $ra, 8192($sp) # encoding: [0x8f,0xbf,0x20,0x00]
17 …lw $31, 2 << 3($29) # CHECK: lw $ra, 16($sp) # encoding: [0x8f,0xbf,0x00,0x10]
18 …lw $31, (2 << 3)($29) # CHECK: lw $ra, 16($sp) # encoding: [0x8f,0xbf,0x00,0x10]
[all …]
Dmicromips-loadstore-instructions.s34 # CHECK-EL: lwm32 $16, $17, $18, $19, $ra, 8($4) # encoding: [0x84,0x22,0…
36 # CHECK-EL: lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $fp, $ra, 8($4) # encoding: [0x24,0x23,0…
38 # CHECK-EL: lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $fp, $ra, 8($4) # encoding: [0x24,0x23,0…
44 # CHECK-EL: lwm16 $16, $17, $ra, 8($sp) # encoding: [0x12,0x45]
46 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
48 # CHECK-EL: lwm16 $16, $17, $ra, 8($sp) # encoding: [0x12,0x45]
50 # CHECK-EL: lwm32 $16, $17, $ra, 64($sp) # encoding: [0x5d,0x22,0x40,0x50]
52 # CHECK-EL: lwm32 $16, $17, $ra, 8($4) # encoding: [0x44,0x22,0x08,0x50]
56 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
58 # CHECK-EL: swm32 $16, $17, $ra, 64($sp) # encoding: [0x5d,0x22,0x40,0xd0]
[all …]
/external/google-breakpad/src/processor/testdata/symbols/libc-2.13.so/F4F8DFCD5A5FB5A7CE64717E9E6AE3890/
Dlibc-2.13.so.sym1712 STACK CFI INIT 1eaf0 90 .cfa: $rsp 16 + .ra: .cfa -8 + ^
1714 STACK CFI INIT 1eb80 2 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1715 STACK CFI INIT 1eb90 9 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1717 STACK CFI INIT 1eba0 210 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1721 STACK CFI INIT 1edb0 1c7 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1725 STACK CFI INIT 1ef80 8 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1726 STACK CFI INIT 1ef90 8 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1727 STACK CFI INIT 1efa0 16 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1728 STACK CFI INIT 1efc0 10 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1730 STACK CFI INIT 1efd0 c3 .cfa: $rsp 8 + .ra: .cfa -8 + ^
[all …]
/external/google-breakpad/src/processor/testdata/symbols/ld-2.13.so/C32AD7E235EA6112E02A5B9D6219C4850/
Dld-2.13.so.sym17 STACK CFI INIT b40 8 .cfa: $rsp 8 + .ra: .cfa -8 + ^
18 STACK CFI INIT b50 5 .cfa: $rsp 8 + .ra: .cfa -8 + ^
19 STACK CFI INIT b60 5 .cfa: $rsp 8 + .ra: .cfa -8 + ^
20 STACK CFI INIT b70 69 .cfa: $rsp 8 + .ra: .cfa -8 + ^
24 STACK CFI INIT be0 49 .cfa: $rsp 8 + .ra: .cfa -8 + ^
28 STACK CFI INIT c30 4ed .cfa: $rsp 8 + .ra: .cfa -8 + ^
37 STACK CFI INIT 1120 600 .cfa: $rsp 8 + .ra: .cfa -8 + ^
41 STACK CFI INIT 1720 9b .cfa: $rsp 8 + .ra: .cfa -8 + ^
45 STACK CFI INIT 17c0 33 .cfa: $rsp 8 + .ra: .cfa -8 + ^
46 STACK CFI INIT 1800 31 .cfa: $rsp 8 + .ra: .cfa -8 + ^
[all …]
/external/jemalloc/test/unit/
Dprng.c6 uint32_t sa, sb, ra, rb; in test_prng_lg_range_u32() local
10 ra = prng_lg_range_u32(&sa, 32, atomic); in test_prng_lg_range_u32()
13 assert_u32_eq(ra, rb, in test_prng_lg_range_u32()
18 assert_u32_eq(ra, rb, in test_prng_lg_range_u32()
22 ra = prng_lg_range_u32(&sa, 32, atomic); in test_prng_lg_range_u32()
24 assert_u32_ne(ra, rb, in test_prng_lg_range_u32()
28 ra = prng_lg_range_u32(&sa, 32, atomic); in test_prng_lg_range_u32()
34 assert_u32_eq(rb, (ra >> (32 - lg_range)), in test_prng_lg_range_u32()
43 uint64_t sa, sb, ra, rb; in test_prng_lg_range_u64() local
47 ra = prng_lg_range_u64(&sa, 64); in test_prng_lg_range_u64()
[all …]
/external/jemalloc_new/test/unit/
Dprng.c6 uint32_t ra, rb; in test_prng_lg_range_u32() local
10 ra = prng_lg_range_u32(&sa, 32, atomic); in test_prng_lg_range_u32()
13 assert_u32_eq(ra, rb, in test_prng_lg_range_u32()
18 assert_u32_eq(ra, rb, in test_prng_lg_range_u32()
22 ra = prng_lg_range_u32(&sa, 32, atomic); in test_prng_lg_range_u32()
24 assert_u32_ne(ra, rb, in test_prng_lg_range_u32()
28 ra = prng_lg_range_u32(&sa, 32, atomic); in test_prng_lg_range_u32()
34 assert_u32_eq(rb, (ra >> (32 - lg_range)), in test_prng_lg_range_u32()
42 uint64_t sa, sb, ra, rb; in test_prng_lg_range_u64() local
46 ra = prng_lg_range_u64(&sa, 64); in test_prng_lg_range_u64()
[all …]
/external/llvm/test/MC/Mips/
Dmicromips-loadstore-instructions.s30 # CHECK-EL: lwm32 $16, $17, $18, $19, $ra, 8($4) # encoding: [0x84,0x22,0…
31 # CHECK-EL: lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $fp, $ra, 8($4) # encoding: [0x24,0x23,0…
32 # CHECK-EL: lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $fp, $ra, 8($4) # encoding: [0x24,0x23,0…
35 # CHECK-EL: lwm16 $16, $17, $ra, 8($sp) # encoding: [0x12,0x45]
36 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
37 # CHECK-EL: lwm16 $16, $17, $ra, 8($sp) # encoding: [0x12,0x45]
38 # CHECK-EL: lwm32 $16, $17, $ra, 64($sp) # encoding: [0x5d,0x22,0x40,0x50]
39 # CHECK-EL: lwm32 $16, $17, $ra, 8($4) # encoding: [0x44,0x22,0x08,0x50]
41 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
42 # CHECK-EL: swm32 $16, $17, $ra, 64($sp) # encoding: [0x5d,0x22,0x40,0xd0]
[all …]
/external/v8/src/ppc/
Dsimulator-ppc.cc1630 int ra = instr->RAValue(); in ExecuteGeneric() local
1631 intptr_t ra_val = get_register(ra); in ExecuteGeneric()
1640 int ra = instr->RAValue(); in ExecuteGeneric() local
1648 uintptr_t ra_val = get_register(ra); in ExecuteGeneric()
1660 uint32_t ra_val = get_register(ra); in ExecuteGeneric()
1678 int ra = instr->RAValue(); in ExecuteGeneric() local
1687 intptr_t ra_val = get_register(ra); in ExecuteGeneric()
1699 int32_t ra_val = get_register(ra); in ExecuteGeneric()
1718 int ra = instr->RAValue(); in ExecuteGeneric() local
1719 uintptr_t ra_val = get_register(ra); in ExecuteGeneric()
[all …]
/external/lua/src/
Dlvm.c517 void luaV_objlen (lua_State *L, StkId ra, const TValue *rb) { in luaV_objlen() argument
524 setivalue(ra, luaH_getn(h)); /* else primitive len */ in luaV_objlen()
528 setivalue(ra, tsvalue(rb)->shrlen); in luaV_objlen()
532 setivalue(ra, tsvalue(rb)->u.lnglen); in luaV_objlen()
542 luaT_callTM(L, tm, rb, rb, ra, 1); in luaV_objlen()
633 StkId ra) { in pushclosure() argument
639 setclLvalue(L, ra, ncl); /* anchor new closure in stack */ in pushclosure()
760 ra = RA(i); /* WARNING: any stack reallocation invalidates 'ra' */ \
800 StkId ra; in luaV_execute() local
804 setobjs2s(L, ra, RB(i)); in luaV_execute()
[all …]
/external/google-breakpad/src/processor/testdata/symbols/libgcc_s.so.1/18B180F90887D8F8B5C35D185444AF4C0/
Dlibgcc_s.so.1.sym129 STACK CFI INIT 2bb0 2c0 .cfa: $rsp 16 + .ra: .cfa -8 + ^
131 STACK CFI INIT 2fe0 4b .cfa: $rsp 8 + .ra: .cfa -8 + ^
132 STACK CFI INIT 3030 29 .cfa: $rsp 8 + .ra: .cfa -8 + ^
133 STACK CFI INIT 3060 67 .cfa: $rsp 8 + .ra: .cfa -8 + ^
134 STACK CFI INIT 30d0 67 .cfa: $rsp 8 + .ra: .cfa -8 + ^
135 STACK CFI INIT 3140 6a .cfa: $rsp 8 + .ra: .cfa -8 + ^
136 STACK CFI INIT 31b0 32 .cfa: $rsp 8 + .ra: .cfa -8 + ^
137 STACK CFI INIT 31f0 32 .cfa: $rsp 8 + .ra: .cfa -8 + ^
138 STACK CFI INIT 3230 2 .cfa: $rsp 8 + .ra: .cfa -8 + ^
139 STACK CFI INIT 3240 1e .cfa: $rsp 8 + .ra: .cfa -8 + ^
[all …]
/external/llvm/test/CodeGen/Mips/llvm-ir/
Dret.ll23 ; Force the delay slot filler off to check that the sequence jr $ra; nop is
24 ; turned into jic 0, $ra.
31 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
32 ; R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JALR
33 ; R6C-DAG: jrc $ra # <MCInst #{{[0-9]+}} JIC
42 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
43 ; R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JALR
52 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
53 ; R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JALR
62 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/RISCV/
Datomic-load-store.ll11 ; RV32I-NEXT: sw ra, 12(sp)
14 ; RV32I-NEXT: lw ra, 12(sp)
30 ; RV32I-NEXT: sw ra, 12(sp)
33 ; RV32I-NEXT: lw ra, 12(sp)
49 ; RV32I-NEXT: sw ra, 12(sp)
52 ; RV32I-NEXT: lw ra, 12(sp)
69 ; RV32I-NEXT: sw ra, 12(sp)
72 ; RV32I-NEXT: lw ra, 12(sp)
90 ; RV32I-NEXT: sw ra, 12(sp)
93 ; RV32I-NEXT: lw ra, 12(sp)
[all …]
Dcalling-conv-sext-zext.ll18 ; RV32I-NEXT: sw ra, 12(sp)
20 ; RV32I-NEXT: lw ra, 12(sp)
33 ; RV32I-NEXT: sw ra, 12(sp)
35 ; RV32I-NEXT: lw ra, 12(sp)
57 ; RV32I-NEXT: sw ra, 12(sp)
61 ; RV32I-NEXT: lw ra, 12(sp)
73 ; RV32I-NEXT: sw ra, 12(sp)
77 ; RV32I-NEXT: lw ra, 12(sp)
98 ; RV32I-NEXT: sw ra, 12(sp)
100 ; RV32I-NEXT: lw ra, 12(sp)
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/RISCV/
Dfunction-call.s12 # INSTR: auipc ra, 0
13 # INSTR: jalr ra
17 # INSTR: auipc ra, 0
18 # INSTR: jalr ra
25 # INSTR: auipc ra, 0
26 # INSTR: jalr ra
31 # INSTR: auipc ra, 0
32 # INSTR: jalr ra
35 call ra
36 # RELOC: R_RISCV_CALL ra 0x0
[all …]
/external/llvm/test/CodeGen/ARM/
Darm-eabi.ll1 ; RUN: llc < %s -mtriple=arm-none-eabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EA…
2 ; RUN: llc < %s -mtriple=arm-none-eabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-…
3 ; RUN: llc < %s -mtriple=arm-none-androideabi -disable-post-ra -o - | FileCheck %s --check-prefix=C…
4 ; RUN: llc < %s -mtriple=arm-none-gnueabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK…
5 ; RUN: llc < %s -mtriple=arm-none-gnueabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHE…
6 ; RUN: llc < %s -mtriple=arm-none-musleabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHEC…
7 ; RUN: llc < %s -mtriple=arm-none-musleabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CH…
8 ; RUN: llc < %s -mtriple=arm-none-eabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-pref…
9 ; RUN: llc < %s -mtriple=arm-none-eabihf -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-pr…
10 ; RUN: llc < %s -mtriple=arm-none-androideabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --che…
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Darm-eabi.ll1 ; RUN: llc < %s -mtriple=arm-none-eabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EA…
2 ; RUN: llc < %s -mtriple=arm-none-eabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-…
3 ; RUN: llc < %s -mtriple=arm-none-androideabi -disable-post-ra -o - | FileCheck %s --check-prefix=C…
4 ; RUN: llc < %s -mtriple=arm-none-gnueabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK…
5 ; RUN: llc < %s -mtriple=arm-none-gnueabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHE…
6 ; RUN: llc < %s -mtriple=arm-none-musleabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHEC…
7 ; RUN: llc < %s -mtriple=arm-none-musleabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CH…
8 ; RUN: llc < %s -mtriple=arm-none-eabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-pref…
9 ; RUN: llc < %s -mtriple=arm-none-eabihf -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-pr…
10 ; RUN: llc < %s -mtriple=arm-none-androideabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --che…
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/
Dselect.ll16 ; 32-NEXT: jr $ra
22 ; 32R2-NEXT: jr $ra
29 ; 32R6-NEXT: jr $ra
35 ; 64-NEXT: jr $ra
41 ; 64R2-NEXT: jr $ra
48 ; 64R6-NEXT: jr $ra
68 ; 32-NEXT: jr $ra
78 ; 32R2-NEXT: jr $ra
90 ; 32R6-NEXT: jr $ra
96 ; 64-NEXT: jr $ra
[all …]
/external/icu/icu4c/source/data/locales/
Dmt.txt602 few{"fi żmien {0} ġurnata oħra"}
603 many{"fi żmien {0} ġurnata oħra"}
605 other{"fi żmien {0} ġurnata oħra"}
619 few{"fi żmien {0} ġurnata oħra"}
620 many{"fi żmien {0} ġurnata oħra"}
622 other{"fi żmien {0} ġurnata oħra"}
636 few{"fi żmien {0} ġurnata oħra"}
637 many{"fi żmien {0} ġurnata oħra"}
639 other{"fi żmien {0} ġurnata oħra"}
689 one{"fi żmien siegħa oħra"}
[all …]

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