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Searched refs:read_aux_reg (Results 1 – 5 of 5) sorted by relevance

/external/u-boot/arch/arc/lib/
Dcache.c187 mmu4.word = read_aux_reg(ARC_AUX_MMU_BCR); in pae_exists()
200 ibcr.word = read_aux_reg(ARC_BCR_IC_BUILD); in icache_exists()
209 return !(read_aux_reg(ARC_AUX_IC_CTRL) & IC_CTRL_CACHE_DISABLE); in icache_enabled()
216 dbcr.word = read_aux_reg(ARC_BCR_DC_BUILD); in dcache_exists()
225 return !(read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_CACHE_DISABLE); in dcache_enabled()
233 sbcr.word = read_aux_reg(ARC_BCR_SLC); in slc_exists()
254 cbcr.word = read_aux_reg(ARC_BCR_CLUSTER); in ioc_exists()
280 ctrl = read_aux_reg(ARC_AUX_SLC_CTRL); in __slc_entire_op()
295 read_aux_reg(ARC_AUX_SLC_CTRL); in __slc_entire_op()
298 while (read_aux_reg(ARC_AUX_SLC_CTRL) & SLC_CTRL_BUSY); in __slc_entire_op()
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Dinterrupts.c24 int status = read_aux_reg(ARC_AUX_STATUS32); in disable_interrupts()
35 unsigned int status = read_aux_reg(ARC_AUX_STATUS32); in enable_interrupts()
/external/u-boot/arch/arc/include/asm/
Darcregs.h83 #define read_aux_reg(reg) __builtin_arc_lr(reg) macro
90 #define CPU_ID_GET() ((read_aux_reg(ARC_AUX_IDENTITY) & 0xFF00) >> 8)
/external/u-boot/drivers/timer/
Darc_timer.c36 val = read_aux_reg(ARC_AUX_TIMER0_CNT); in arc_timer_get_count()
39 val = read_aux_reg(ARC_AUX_TIMER1_CNT); in arc_timer_get_count()
/external/u-boot/board/synopsys/axs10x/
Daxs10x.c93 int core_family = read_aux_reg(ARC_AUX_IDENTITY) & 0xff; in smp_kick_all_cpus()