/external/libdrm/radeon/ |
D | radeon_cs_space.c | 44 uint32_t read_domains, write_domain; in radeon_cs_setup_bo() local 49 read_domains = sc->read_domains; in radeon_cs_setup_bo() 54 bo->space_accounted = sc->new_accounted = (read_domains << 16) | write_domain; in radeon_cs_setup_bo() 63 if (read_domains && ((read_domains << 16) == bo->space_accounted)) { in radeon_cs_setup_bo() 77 sc->new_accounted = read_domains << 16; in radeon_cs_setup_bo() 95 } else if (read_domains & old_write) { in radeon_cs_setup_bo() 101 if (read_domains != old_read) in radeon_cs_setup_bo() 102 … fprintf(stderr,"READ DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, read_domains, old_read); in radeon_cs_setup_bo() 167 uint32_t read_domains, uint32_t write_domain) in radeon_cs_space_add_persistent_bo() argument 174 csi->bos[i].read_domains == read_domains && in radeon_cs_space_add_persistent_bo() [all …]
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D | radeon_cs.h | 98 uint32_t read_domains, 112 uint32_t read_domains,
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D | radeon_bo_gem.c | 344 radeon_gem_set_domain(struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain) in radeon_gem_set_domain() argument 351 args.read_domains = read_domains; in radeon_gem_set_domain()
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D | radeon_bo_gem.h | 42 int radeon_gem_set_domain(struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain);
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D | radeon_cs_int.h | 7 uint32_t read_domains; member
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/external/mesa3d/src/mesa/drivers/dri/i915/ |
D | intel_batchbuffer.h | 43 uint32_t read_domains, 48 uint32_t read_domains, 139 #define OUT_RELOC(buf, read_domains, write_domain, delta) do { \ argument 141 read_domains, write_domain, delta); \ 143 #define OUT_RELOC_FENCED(buf, read_domains, write_domain, delta) do { \ argument 145 read_domains, write_domain, delta); \
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D | intel_batchbuffer.c | 197 uint32_t read_domains, uint32_t write_domain, in intel_batchbuffer_emit_reloc() argument 204 read_domains, write_domain); in intel_batchbuffer_emit_reloc() 221 uint32_t read_domains, in intel_batchbuffer_emit_reloc_fenced() argument 229 read_domains, write_domain); in intel_batchbuffer_emit_reloc_fenced()
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/external/libdrm/intel/ |
D | intel_bufmgr.c | 201 uint32_t read_domains, uint32_t write_domain) in drm_intel_bo_emit_reloc() argument 205 read_domains, write_domain); in drm_intel_bo_emit_reloc() 212 uint32_t read_domains, uint32_t write_domain) in drm_intel_bo_emit_reloc_fence() argument 216 read_domains, write_domain); in drm_intel_bo_emit_reloc_fence()
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D | intel_bufmgr_priv.h | 190 uint32_t read_domains, uint32_t write_domain); 194 uint32_t read_domains,
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D | intel_bufmgr_fake.c | 83 uint32_t read_domains; member 200 uint32_t read_domains; member 1252 uint32_t read_domains, uint32_t write_domain) in drm_intel_fake_emit_reloc() argument 1286 r->read_domains = read_domains; in drm_intel_fake_emit_reloc() 1323 target_fake->read_domains |= r->read_domains; in drm_intel_fake_calculate_domains() 1408 bo_fake->read_domains = 0; in drm_intel_bo_fake_post_submit() 1442 batch_fake->read_domains = I915_GEM_DOMAIN_COMMAND; in drm_intel_fake_bo_exec()
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D | intel_bufmgr.h | 153 uint32_t read_domains, uint32_t write_domain); 157 uint32_t read_domains, uint32_t write_domain);
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D | intel_bufmgr_gem.c | 1478 set_domain.read_domains = I915_GEM_DOMAIN_CPU; in drm_intel_gem_bo_map() 1592 set_domain.read_domains = I915_GEM_DOMAIN_GTT; in drm_intel_gem_bo_map_gtt() 1884 set_domain.read_domains = I915_GEM_DOMAIN_GTT; in drm_intel_gem_bo_start_gtt_access() 1892 set_domain.read_domains, set_domain.write_domain, in drm_intel_gem_bo_start_gtt_access() 1952 uint32_t read_domains, uint32_t write_domain, in do_bo_emit_reloc() argument 2018 bo_gem->relocs[bo_gem->reloc_count].read_domains = read_domains; in do_bo_emit_reloc() 2078 uint32_t read_domains, uint32_t write_domain) in drm_intel_gem_bo_emit_reloc() argument 2087 read_domains, write_domain, in drm_intel_gem_bo_emit_reloc() 2095 uint32_t read_domains, uint32_t write_domain) in drm_intel_gem_bo_emit_reloc_fence() argument 2098 read_domains, write_domain, true); in drm_intel_gem_bo_emit_reloc_fence()
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/external/mesa3d/src/intel/vulkan/ |
D | anv_gem.c | 139 uint32_t read_domains, uint32_t write_domain) in anv_gem_set_domain() argument 143 .read_domains = read_domains, in anv_gem_set_domain()
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D | anv_gem_stubs.c | 120 uint32_t read_domains, uint32_t write_domain) in anv_gem_set_domain() argument
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/external/libdrm/nouveau/ |
D | pushbuf.c | 192 kref->read_domains |= domains_rd; in pushbuf_kref() 203 kref->read_domains = domains_rd; in pushbuf_kref() 279 kref->read_domains, kref->write_domains); in pushbuf_dump() 380 if (kref->read_domains) in pushbuf_submit() 761 if (kref->read_domains) in nouveau_pushbuf_refd()
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/external/mesa3d/src/gallium/winsys/radeon/drm/ |
D | radeon_drm_cs.c | 274 reloc->read_domains = 0; in radeon_lookup_or_add_real_buffer() 365 added_domains = (rd | wd) & ~(reloc->read_domains | reloc->write_domain); in radeon_drm_cs_add_buffer() 366 reloc->read_domains |= rd; in radeon_drm_cs_add_buffer() 737 if ((usage & RADEON_USAGE_READ) && cs->csc->relocs[index].read_domains) in radeon_bo_is_referenced()
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/external/kernel-headers/original/uapi/drm/ |
D | nouveau_drm.h | 75 __u32 read_domains; member
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D | radeon_drm.h | 878 __u32 read_domains; member 978 __u32 read_domains; member
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D | i915_drm.h | 739 __u32 read_domains; member 783 __u32 read_domains; member
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/external/libdrm/include/drm/ |
D | nouveau_drm.h | 154 __u32 read_domains; member
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D | radeon_drm.h | 879 __u32 read_domains; member 979 __u32 read_domains; member
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D | i915_drm.h | 709 __u32 read_domains; member 753 __u32 read_domains; member
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/external/minigbm/ |
D | i915.c | 519 set_domain.read_domains = I915_GEM_DOMAIN_CPU; in i915_bo_invalidate() 523 set_domain.read_domains = I915_GEM_DOMAIN_GTT; in i915_bo_invalidate()
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/external/mesa3d/include/drm-uapi/ |
D | i915_drm.h | 667 __u32 read_domains; member 711 __u32 read_domains; member
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
D | brw_bufmgr.c | 399 .read_domains = I915_GEM_DOMAIN_CPU, in bo_alloc_internal()
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