| /external/arm-optimized-routines/test/testcases/directed/ |
| D | rred2.tst | 6 func=rred op1=4139eb71.48f354d6 result=3c8d0afa.32c646ca.18a res2=00000001 errno=0
7 func=rred op1=414344ba.16f4f99a result=3cc23686.da4d2965.916 res2=00000003 errno=0
8 func=rred op1=414a4327.087660e3 result=bccb599f.84bc5cab.fb1 res2=00000003 errno=0
9 func=rred op1=41569815.aff42738 result=3cc5d7e6.20a5f23e.d47 res2=00000001 errno=0
10 func=rred op1=415d3ecc.e1f28274 result=bcad49a4.1d0b3b67.209 res2=00000003 errno=0
11 func=rred op1=416841c3.7c73be07 result=3ccd1aa4.ad5783f1.5aa res2=00000001 errno=0
12 func=rred op1=416b951f.1572eba5 result=bc3f54f5.227a4e83.fbf res2=00000003 errno=0
13 func=rred op1=4174456b.dcf64b08 result=3caccc50.4881522d.10a res2=00000003 errno=0
14 func=rred op1=4175ef19.a975e1d7 result=bcc5f73b.15c86c8d.587 res2=00000001 errno=0
15 func=rred op1=41817269.26f7c621 result=bcadc6f7.f19524a1.308 res2=00000001 errno=0
[all …]
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| D | rred5.tst | 6 func=rred op1=6e8a55a8.e86a3a97 result=3cc88942.65ed745f.705 res2=00000001 errno=0
7 func=rred op1=6e8d9233.0c3288a5 result=bc97e750.acd8c3df.9e9 res2=00000003 errno=0
8 func=rred op1=6e95c615.04acdcba result=3c93315f.f3cbf3e7.5a8 res2=00000003 errno=0
9 func=rred op1=6e97645a.169103c1 result=bcc92000.7d0f0e5e.78d res2=00000001 errno=0
10 func=rred op1=6ea2af28.89dc1a48 result=bcbcb3a8.a9cbc0d9.753 res2=00000001 errno=0
11 func=rred op1=6ea8dd01.7f7d9f2c result=3cc7f284.4ecbda60.67d res2=00000003 errno=0
12 func=rred op1=6eb7518b.42153df3 result=3cccbedc.4bbed75a.3e7 res2=00000001 errno=0
13 func=rred op1=6ebf1da9.499ae9de result=bca30491.6bff99e4.355 res2=00000001 errno=0
14 func=rred op1=6ec8e668.e9bb8213 result=bcd0ba66.8265d3a9.414 res2=00000003 errno=0
15 func=rred op1=6eca71df.2723e34c result=3ca35e2e.7b984dea.7fa res2=00000001 errno=0
[all …]
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| D | rred3.tst | 6 func=rred op1=4f454f91.26ab5b7c result=bccabf68.428292b8.71a res2=00000003 errno=0
7 func=rred op1=4f569eab.0985179b result=bc561ece.c9c577fd.3e9 res2=00000003 errno=0
8 func=rred op1=4f5b7b07.c8260da4 result=3cd61dee.99d944a9.b99 res2=00000001 errno=0
9 func=rred op1=4f64d809.9ba17aa6 result=3cb123f9.b608e0bb.0c7 res2=00000001 errno=0
10 func=rred op1=4f68654c.7768b490 result=bcb285e6.a2a5383a.e06 res2=00000003 errno=0
11 func=rred op1=4f71868a.855f3127 result=bcdf60e1.eb2be0c7.29c res2=00000001 errno=0
12 func=rred op1=4f7f440e.697237f9 result=3cc9b5f6.910d5118.92b res2=00000003 errno=0
13 func=rred op1=4f808557.ebaaea77 result=3caf8419.92d91276.712 res2=00000001 errno=0
14 func=rred op1=4f8cb7fe.275f44bf result=bcb549c0.7bdde73a.883 res2=00000003 errno=0
15 func=rred op1=4f939201.7a980109 result=3ca9fc65.e067b477.218 res2=00000001 errno=0
[all …]
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| D | rred4.tst | 6 func=rred op1=5ee8da6e.555f15d0 result=3ccad12f.2b4c25d3.eaa res2=00000001 errno=0
7 func=rred op1=5ef7833f.a59d0dfd result=3c919ca2.3f5c493c.c76 res2=00000003 errno=0
8 func=rred op1=5efb3542.79418f04 result=bca803d2.ba28019c.b3f res2=00000001 errno=0
9 func=rred op1=5f014ca4.10454889 result=bcc66a06.9b751384.b8d res2=00000001 errno=0
10 func=rred op1=5f0db9db.3af4d371 result=3ccf3857.bb233823.1c8 res2=00000003 errno=0
11 func=rred op1=5f1467f1.daf12b43 result=bcc202de.0b9e0135.86f res2=00000003 errno=0
12 func=rred op1=5f1e5090.43ed71be result=3c966ae3.892121b9.b5c res2=00000001 errno=0
13 func=rred op1=5f25f598.c0471ca0 result=bcb26919.d7dfb92e.468 res2=00000003 errno=0
14 func=rred op1=5f2fde37.2943631b result=3cd035f4.06ca3721.2c0 res2=00000003 errno=0
15 func=rred op1=5f3355c3.e3c9e36e result=3cc469fe.b0806d73.fe2 res2=00000001 errno=0
[all …]
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| D | rred.tst | 6 func=rred op1=40000000.00000000 result=3fdb7812.aeef4b9e.e59 res2=00000001 errno=0
7 func=rred op1=400fffff.ffffffff result=bfe6cbe3.f9990e95.a79 res2=00000003 errno=0
8 func=rred op1=40100000.00000000 result=bfe6cbe3.f9990e91.a79 res2=00000003 errno=0
9 func=rred op1=4012d97c.7f3321d2 result=bcaa7939.4c9e8a0a.515 res2=00000003 errno=0
10 func=rred op1=401c90fd.aa22168c result=bfe6cbe3.f9990e92.c1f res2=00000001 errno=0
11 func=rred op1=401f6a7a.2955385f result=3cc4f828.2013467b.b36 res2=00000001 errno=0
12 func=rred op1=40200000.00000000 result=3fc2b0ba.d558f434.f82 res2=00000001 errno=0
13 func=rred op1=4025fdbb.e9bba775 result=bcbee2c2.d963a10c.099 res2=00000003 errno=0
14 func=rred op1=402c463a.beccb2bc result=3cd6128a.83448c3c.217 res2=00000001 errno=0
15 func=rred op1=402c90fd.aa22168c result=3fc2b0ba.d558f42c.251 res2=00000001 errno=0
[all …]
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| /external/python/cpython2/Mac/Demo/resources/ |
| D | copyres.py | 35 res2 = Get1Resource(type, id)
37 res2 = None
38 if res2:
40 print (res2.size, res2.data)
41 print res2.GetResInfo()
42 if res2.HomeResFile() == output:
44 elif res2.HomeResFile() == input:
47 print 'Home:', res2.HomeResFile()
|
| /external/libvpx/libvpx/vp8/common/mips/msa/ |
| D | idct_msa.c | 91 v4i32 res0, res1, res2, res3; in idct4x4_addblk_msa() local
105 res2, res3); in idct4x4_addblk_msa()
106 ILVR_H4_SW(zero, res0, zero, res1, zero, res2, zero, res3, res0, res1, res2, in idct4x4_addblk_msa()
108 ADD4(res0, vt0, res1, vt1, res2, vt2, res3, vt3, res0, res1, res2, res3); in idct4x4_addblk_msa()
111 res2 = CLIP_SW_0_255(res2); in idct4x4_addblk_msa()
113 PCKEV_B2_SW(res0, res1, res2, res3, vt0, vt1); in idct4x4_addblk_msa()
121 v8i16 vec, res0, res1, res2, res3, dst0, dst1; in idct4x4_addconst_msa() local
129 res2, res3); in idct4x4_addconst_msa()
130 ADD4(res0, vec, res1, vec, res2, vec, res3, vec, res0, res1, res2, res3); in idct4x4_addconst_msa()
131 CLIP_SH4_0_255(res0, res1, res2, res3); in idct4x4_addconst_msa()
[all …]
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| /external/ltp/testcases/kernel/syscalls/getcwd/ |
| D | getcwd03.c | 48 char *res2 = NULL; in verify_getcwd() local
62 res2 = getcwd(NULL, 0); in verify_getcwd()
63 if (!res2) { in verify_getcwd()
69 if (strcmp(res1, res2)) { in verify_getcwd()
72 res1, res2); in verify_getcwd()
89 free(res2); in verify_getcwd()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Bitcode/ |
| D | binaryIntInstructions.3.2.ll | 13 ; CHECK-NEXT: %res2 = add i8 %x2, %x2
14 %res2 = add i8 %x2, %x2
42 ; CHECK-NEXT: %res2 = add nuw nsw <3 x i8> %x2, %x2
43 %res2 = add nuw nsw <3 x i8> %x2, %x2
62 ; CHECK-NEXT: %res2 = add nuw nsw <3 x i16> %x2, %x2
63 %res2 = add nuw nsw <3 x i16> %x2, %x2
82 ; CHECK-NEXT: %res2 = add nuw nsw <3 x i32> %x2, %x2
83 %res2 = add nuw nsw <3 x i32> %x2, %x2
102 ; CHECK-NEXT: %res2 = add nuw nsw <3 x i64> %x2, %x2
103 %res2 = add nuw nsw <3 x i64> %x2, %x2
[all …]
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| D | bitwiseInstructions.3.2.ll | 13 ; CHECK: %res2 = shl nuw i8 %x1, %x1
14 %res2 = shl nuw i8 %x1, %x1
30 ; CHECK: %res2 = lshr exact i8 %x1, %x1
31 %res2 = lshr exact i8 %x1, %x1
41 ; CHECK-NEXT: %res2 = ashr exact i8 %x1, %x1
42 %res2 = ashr exact i8 %x1, %x1
|
| /external/llvm/test/Bitcode/ |
| D | binaryIntInstructions.3.2.ll | 13 ; CHECK-NEXT: %res2 = add i8 %x2, %x2
14 %res2 = add i8 %x2, %x2
42 ; CHECK-NEXT: %res2 = add nuw nsw <3 x i8> %x2, %x2
43 %res2 = add nuw nsw <3 x i8> %x2, %x2
62 ; CHECK-NEXT: %res2 = add nuw nsw <3 x i16> %x2, %x2
63 %res2 = add nuw nsw <3 x i16> %x2, %x2
82 ; CHECK-NEXT: %res2 = add nuw nsw <3 x i32> %x2, %x2
83 %res2 = add nuw nsw <3 x i32> %x2, %x2
102 ; CHECK-NEXT: %res2 = add nuw nsw <3 x i64> %x2, %x2
103 %res2 = add nuw nsw <3 x i64> %x2, %x2
[all …]
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| D | bitwiseInstructions.3.2.ll | 13 ; CHECK: %res2 = shl nuw i8 %x1, %x1
14 %res2 = shl nuw i8 %x1, %x1
30 ; CHECK: %res2 = lshr exact i8 %x1, %x1
31 %res2 = lshr exact i8 %x1, %x1
41 ; CHECK-NEXT: %res2 = ashr exact i8 %x1, %x1
42 %res2 = ashr exact i8 %x1, %x1
|
| /external/llvm/test/CodeGen/X86/ |
| D | avx512dq-intrinsics.ll | 16 %res2 = add <8 x i64> %res, %res1
17 ret <8 x i64> %res2
32 %res2 = add <8 x i64> %res, %res1
33 ret <8 x i64> %res2
48 %res2 = add <8 x i64> %res, %res1
49 ret <8 x i64> %res2
64 %res2 = add <8 x i64> %res, %res1
65 ret <8 x i64> %res2
80 %res2 = fadd <8 x double> %res, %res1
81 ret <8 x double> %res2
[all …]
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| D | avx512cdvl-intrinsics.ll | 21 %res2 = add <4 x i32> %res, %res1
22 %res4 = add <4 x i32> %res2, %res3
38 %res2 = add <8 x i32> %res, %res1
39 ret <8 x i32> %res2
54 %res2 = add <2 x i64> %res, %res1
55 ret <2 x i64> %res2
70 %res2 = add <4 x i64> %res, %res1
71 ret <4 x i64> %res2
89 %res2 = add <4 x i32> %res, %res1
90 %res4 = add <4 x i32> %res2, %res3
[all …]
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| /external/llvm/test/Transforms/ConstantHoisting/ARM/ |
| D | bad-cases.ll | 54 ; CHECK: %res2 = srem i32 %l2, 1000000000
60 %l2 = phi i32 [%res2, %loop], [%in2, %entry]
63 %res2 = srem i32 %l2, 1000000000
64 store volatile i32 %res2, i32* %addr
65 %again = icmp eq i32 %res1, %res2
75 ; CHECK: %res2 = urem i32 %l2, 1000000000
82 %l2 = phi i32 [%res2, %loop], [%in2, %entry]
85 %res2 = urem i32 %l2, 1000000000
86 store volatile i32 %res2, i32* %addr
87 %again = icmp eq i32 %res1, %res2
|
| /external/libaom/libaom/av1/common/arm/ |
| D | wiener_convolve_neon.c | 79 int16x8_t res0, res1, res2, res3; in av1_wiener_convolve_add_src_neon() local
120 res2 = vreinterpretq_s16_u16(vaddl_u8(t2, t4)); in av1_wiener_convolve_add_src_neon()
122 res4 = wiener_convolve8_horiz_8x8(res0, res1, res2, res3, filter_x_tmp, in av1_wiener_convolve_add_src_neon()
127 res2 = vreinterpretq_s16_u16(vaddl_u8(t3, t5)); in av1_wiener_convolve_add_src_neon()
129 res5 = wiener_convolve8_horiz_8x8(res0, res1, res2, res3, filter_x_tmp, in av1_wiener_convolve_add_src_neon()
134 res2 = vreinterpretq_s16_u16(vaddl_u8(t4, t6)); in av1_wiener_convolve_add_src_neon()
136 res6 = wiener_convolve8_horiz_8x8(res0, res1, res2, res3, filter_x_tmp, in av1_wiener_convolve_add_src_neon()
141 res2 = vreinterpretq_s16_u16(vaddl_u8(t5, t7)); in av1_wiener_convolve_add_src_neon()
143 res7 = wiener_convolve8_horiz_8x8(res0, res1, res2, res3, filter_x_tmp, in av1_wiener_convolve_add_src_neon()
148 res2 = vreinterpretq_s16_u16(vaddl_u8(t6, t8)); in av1_wiener_convolve_add_src_neon()
[all …]
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| /external/u-boot/arch/powerpc/include/asm/ |
| D | immap_8xx.h | 28 char res2[0xc]; member
56 char res2[4]; member
85 char res2[4]; member
103 char res2[0x02]; member
159 char res2[0x10]; member
184 char res2[3]; member
238 char res2[6]; member
272 char res2[8]; member
285 char res2[2]; member
295 char res2[2]; member
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/ |
| D | asm-18.ll | 162 %res2 = extractvalue { i32, i32 } %res, 1
164 %trunc2 = trunc i32 %res2 to i8
185 %res2 = extractvalue { i32, i32 } %res, 1
187 %trunc2 = trunc i32 %res2 to i16
336 %res2 = call i32 asm "stepb $0, $1", "=h,h"(i32 %or1)
337 %and2 = and i32 %res2, -65536
355 %res2 = call i32 asm "stepb $0, $1", "=r,r"(i32 %or1)
356 %and2 = and i32 %res2, -65536
375 %res2 = call i32 asm "stepb $0, $1", "=h,h"(i32 %or1)
376 %or2 = or i32 %res2, 34661
[all …]
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| /external/u-boot/arch/arm/include/asm/arch-omap3/ |
| D | cpu.h | 23 u8 res2[0x22A]; member
52 u8 res2[0x08]; member
103 u8 res2[0x34]; member
121 u8 res2[0x14]; member
136 u8 res2[0x28]; member
163 unsigned char res2[8]; member
247 u8 res2[0x34]; member
295 u8 res2[0x10]; member
314 u8 res2[0x18]; member
402 u8 res2[0x50c]; member
[all …]
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| /external/u-boot/include/ |
| D | fis.h | 29 u8 res2[4]; member
50 u8 res2; member
73 u8 res2[2]; member
84 u8 res2; member
108 u8 res2; member
124 u8 res2; member
|
| /external/llvm/test/CodeGen/SystemZ/ |
| D | asm-18.ll | 162 %res2 = extractvalue { i32, i32 } %res, 1
164 %trunc2 = trunc i32 %res2 to i8
185 %res2 = extractvalue { i32, i32 } %res, 1
187 %trunc2 = trunc i32 %res2 to i16
332 %res2 = call i32 asm "stepb $0, $1", "=h,h"(i32 %or1)
333 %and2 = and i32 %res2, -65536
351 %res2 = call i32 asm "stepb $0, $1", "=r,r"(i32 %or1)
352 %and2 = and i32 %res2, -65536
371 %res2 = call i32 asm "stepb $0, $1", "=h,h"(i32 %or1)
372 %or2 = or i32 %res2, 34661
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/ConstantHoisting/ARM/ |
| D | bad-cases.ll | 54 ; CHECK: %res2 = srem i32 %l2, 1000000000
60 %l2 = phi i32 [%res2, %loop], [%in2, %entry]
63 %res2 = srem i32 %l2, 1000000000
64 store volatile i32 %res2, i32* %addr
65 %again = icmp eq i32 %res1, %res2
75 ; CHECK: %res2 = urem i32 %l2, 1000000000
82 %l2 = phi i32 [%res2, %loop], [%in2, %entry]
85 %res2 = urem i32 %l2, 1000000000
86 store volatile i32 %res2, i32* %addr
87 %again = icmp eq i32 %res1, %res2
|
| /external/ltp/testcases/kernel/fs/fs_perms/ |
| D | fs_perms.c | 185 int res1, res2 = 1; in main() local
213 res2 = testfperm(TEST_FILE_NAME2, 1, user_id, group_id, fperm); in main()
215 if (res2 == exp_res) in main()
216 res2 = 1; in main()
218 res2 = 0; in main()
223 tst_resm((exp_res == res1) && res2 ? TPASS : TFAIL, in main()
|
| /external/u-boot/include/linux/ |
| D | immap_qe.h | 65 u8 res2[0x20]; member
82 u8 res2[0x8]; member
148 u8 res2[0x46]; member
178 u8 res2[0x1]; member
199 u8 res2[0x1]; member
254 u8 res2[4]; member
286 u8 res2[0x1]; member
321 u8 res2[0x8]; member
390 u8 res2[0x7]; member
417 u8 res2[0x200 - 0x091]; member
[all …]
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| /external/wpa_supplicant_8/wpa_supplicant/ |
| D | op_classes.c | 166 enum chan_allowed res, res2; in verify_channel() local
168 res2 = res = allow_channel(mode, channel, &flag); in verify_channel()
172 res2 = allow_channel(mode, channel - 4, NULL); in verify_channel()
176 res2 = allow_channel(mode, channel + 4, NULL); in verify_channel()
183 res2 = res = verify_80mhz(mode, channel); in verify_channel()
190 res2 = res = verify_160mhz(mode, channel); in verify_channel()
197 res2 = res = verify_80mhz(mode, channel); in verify_channel()
200 if (res == NOT_ALLOWED || res2 == NOT_ALLOWED) in verify_channel()
203 if (res == NO_IR || res2 == NO_IR) in verify_channel()
|