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Searched refs:row_3_4 (Results 1 – 10 of 10) sorted by relevance

/external/u-boot/arch/arm/mach-rockchip/
Dsdram_common.c16 u32 rank, col, bk, cs0_row, cs1_row, bw, row_3_4; in rockchip_sdram_size() local
37 row_3_4 = sys_reg >> SYS_REG_ROW_3_4_SHIFT(ch) & in rockchip_sdram_size()
44 if (row_3_4) in rockchip_sdram_size()
48 rank, col, bk, cs0_row, bw, row_3_4); in rockchip_sdram_size()
/external/u-boot/arch/arm/include/asm/arch-rockchip/
Dsdram_rk3399.h88 unsigned int row_3_4; member
Dsdram.h28 u8 row_3_4; member
Dsdram_rk322x.h28 u8 row_3_4; member
/external/u-boot/drivers/ram/rockchip/
Dsdram_rk322x.c585 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(0); in dram_all_config()
669 sdram_params->ch[0].row_3_4 = 0; in dram_cap_detect()
Ddmc-rk3368.c653 params->chan.row_3_4 = 0; in sdram_col_row_detect()
780 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan); in dram_all_config()
Dsdram_rk3188.c544 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan); in dram_all_config()
671 sdram_params->ch[channel].row_3_4 = 0; in sdram_col_row_detect()
Dsdram_rk3399.c921 if (sdram_params->ch[channel].row_3_4) { in set_ddrconfig()
951 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(channel); in dram_all_config()
Dsdram_rk3288.c601 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan); in dram_all_config()
715 sdram_params->ch[channel].row_3_4 = 0; in sdram_col_row_detect()
/external/u-boot/doc/device-tree-bindings/clock/
Drockchip,rk3288-dmc.txt100 row_3_4