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Searched refs:rx2 (Results 1 – 12 of 12) sorted by relevance

/external/clang/test/SemaCXX/
Ddefault-constructor-initializers.cpp19 X2 & rx2; // expected-note {{declared here}} member
/external/autotest/client/tools/
Dhtml_report.py1500 rx2 = re.compile('([^a-zA-Z_0-9])')
1501 updated_tag = rx2.sub('_', res['title'])
/external/u-boot/arch/arm/dts/
Ddm816x.dtsi309 "tx2", "rx2", "tx3", "rx3";
446 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
486 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
Dam33xx.dtsi544 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
591 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
Dda850.dtsi478 "rx1", "rx2", "rx3", "rx4",
Domap3.dtsi384 "tx2", "rx2", "tx3", "rx3";
Dtegra114.dtsi568 dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2",
Dtegra30.dtsi701 dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2",
Dtegra124.dtsi808 dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2",
Ddra7.dtsi1312 "tx2", "rx2", "tx3", "rx3";
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/msa/
Dspill.ll110 %rx2 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %rx1, <16 x i8> %2)
111 %rx3 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %rx2, <16 x i8> %3)
259 %rx2 = call <8 x i16> @llvm.mips.addv.h(<8 x i16> %rx1, <8 x i16> %2)
260 %rx3 = call <8 x i16> @llvm.mips.addv.h(<8 x i16> %rx2, <8 x i16> %3)
408 %rx2 = call <4 x i32> @llvm.mips.addv.w(<4 x i32> %rx1, <4 x i32> %2)
409 %rx3 = call <4 x i32> @llvm.mips.addv.w(<4 x i32> %rx2, <4 x i32> %3)
557 %rx2 = call <2 x i64> @llvm.mips.addv.d(<2 x i64> %rx1, <2 x i64> %2)
558 %rx3 = call <2 x i64> @llvm.mips.addv.d(<2 x i64> %rx2, <2 x i64> %3)
/external/llvm/test/CodeGen/Mips/msa/
Dspill.ll110 %rx2 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %rx1, <16 x i8> %2)
111 %rx3 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %rx2, <16 x i8> %3)
259 %rx2 = call <8 x i16> @llvm.mips.addv.h(<8 x i16> %rx1, <8 x i16> %2)
260 %rx3 = call <8 x i16> @llvm.mips.addv.h(<8 x i16> %rx2, <8 x i16> %3)
408 %rx2 = call <4 x i32> @llvm.mips.addv.w(<4 x i32> %rx1, <4 x i32> %2)
409 %rx3 = call <4 x i32> @llvm.mips.addv.w(<4 x i32> %rx2, <4 x i32> %3)
557 %rx2 = call <2 x i64> @llvm.mips.addv.d(<2 x i64> %rx1, <2 x i64> %2)
558 %rx3 = call <2 x i64> @llvm.mips.addv.d(<2 x i64> %rx2, <2 x i64> %3)