| /external/capstone/suite/MC/AArch64/ |
| D | neon-scalar-cvt.s.cs | 2 0xb6,0xd9,0x21,0x5e = scvtf s22, s13
4 0xb6,0xd9,0x21,0x7e = ucvtf s22, s13
6 0xb6,0xe5,0x20,0x5f = scvtf s22, s13, #32
8 0xb6,0xe5,0x20,0x7f = ucvtf s22, s13, #32
14 0xb6,0x69,0x61,0x7e = fcvtxn s22, d13
19 0xb6,0xb9,0x21,0x5e = fcvtms s22, s13
23 0xb6,0xa9,0x21,0x5e = fcvtns s22, s13
27 0xb6,0xa9,0xa1,0x5e = fcvtps s22, s13
|
| D | neon-scalar-mul.s.cs | 6 0xd4,0xde,0x2f,0x5e = fmulx s20, s22, s15
13 0xcf,0xd2,0xac,0x5e = sqdmull d15, s22, s12
|
| D | neon-scalar-recip.s.cs | 10 0xb6,0xd9,0xa1,0x7e = frsqrte s22, s13
|
| D | neon-scalar-by-elem-mla.s.cs | 5 0xd0,0x1a,0xb0,0x5f = fmla s16, s22, v16.s[3]
|
| D | neon-scalar-by-elem-mul.s.cs | 5 0xd0,0x9a,0xb0,0x5f = fmul s16, s22, v16.s[3]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | neon-scalar-cvt.s | 10 scvtf s22, s13
22 ucvtf s22, s13
34 scvtf s22, s13, #32
46 ucvtf s22, s13, #32
82 fcvtxn s22, d13
118 fcvtms s22, s13
144 fcvtns s22, s13
170 fcvtps s22, s13
|
| D | neon-scalar-mul.s | 30 fmulx s20, s22, s15
62 sqdmull d15, s22, s12
|
| D | arm32-elf-relocs.s | 209 ldr s22, [x21, :got_lo12:sym]
244 ldr s22, [x21, :gottprel_lo12:sym]
247 ldr s22, [x21, :tlsdesc_lo12:sym]
|
| D | neon-scalar-recip.s | 58 frsqrte s22, s13
|
| /external/llvm/test/MC/AArch64/ |
| D | neon-scalar-cvt.s | 10 scvtf s22, s13
22 ucvtf s22, s13
34 scvtf s22, s13, #32
46 ucvtf s22, s13, #32
82 fcvtxn s22, d13
118 fcvtms s22, s13
144 fcvtns s22, s13
170 fcvtps s22, s13
|
| D | neon-scalar-mul.s | 30 fmulx s20, s22, s15
62 sqdmull d15, s22, s12
|
| D | neon-scalar-recip.s | 58 frsqrte s22, s13
|
| /external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/ |
| D | popmult.ll | 12 ; RUN: -reg-use s20,s22,s23 \
18 ; RUN: -reg-use s20,s22,s23 \
23 ; RUN: -reg-use s20,s22,s23 \
29 ; RUN: -reg-use s20,s22,s23 \
40 ; ASM-NEXT: vpush {s22, s23}
59 ; ASM-NEXT: vpop {s22, s23}
|
| D | vmov-fp.ll | 11 ; RUN: -reg-use s20,s22,d20,d22 \
17 ; RUN: -reg-use s20,s22,d20,d22 \
22 ; RUN: -reg-use s20,s22,d20,d22 \
28 ; RUN: -reg-use s20,s22,d20,d22 \
38 ; ASM: vmovne.f32 s20, s22
|
| D | vadd.ll | 10 ; RUN: -reg-use s20,s22,d20,d22 \
16 ; RUN: -reg-use s20,s22,d20,d22 \
21 ; RUN: -reg-use s20,s22,d20,d22 \
27 ; RUN: -reg-use s20,s22,d20,d22 \
38 ; ASM: vadd.f32 s20, s20, s22
|
| D | vmla.ll | 12 ; RUN: -reg-use=s20,s21,s22,d20,d21,d22 \
17 ; RUN: --args -O2 -reg-use=s20,s21,s22,d20,d21,d22 \
22 ; RUN: -reg-use=s20,s21,s22,d20,d21,d22 \
27 ; RUN: --args -O2 -reg-use=s20,s21,s22,d20,d21,d22 \
37 ; ASM: vmla.f32 s21, s20, s22
|
| D | vmls.ll | 12 ; RUN: -reg-use=s20,s21,s22,d20,d21,d22 \
17 ; RUN: --args -O2 -reg-use=s20,s21,s22,d20,d21,d22 \
22 ; RUN: -reg-use=s20,s21,s22,d20,d21,d22 \
27 ; RUN: --args -O2 -reg-use=s20,s21,s22,d20,d21,d22 \
37 ; ASM: vmls.f32 s21, s20, s22
|
| D | vmov-cast.ll | 9 ; RUN: -reg-use s20,s22,d20,d22 \
15 ; RUN: -reg-use s20,s22,d20,d22 \
20 ; RUN: -reg-use s20,s22,d20,d22 \
26 ; RUN: -reg-use s20,s22,d20,d22 \
|
| /external/tensorflow/tensorflow/core/lib/core/ |
| D | stringpiece_test.cc | 37 StringPiece s22(hello, 6); in TEST() local
38 EXPECT_TRUE(s22.data() == hello); in TEST()
39 EXPECT_EQ(6, s22.size()); in TEST()
|
| /external/boringssl/src/ssl/test/runner/ed25519/internal/edwards25519/ |
| D | edwards25519.go | 1087 s22 := a11 * b11
1123 carry[22] = (s22 + (1 << 20)) >> 21
1125 s22 -= carry[22] << 21
1158 s22 += carry[21]
1169 s10 += s22 * 666643
1170 s11 += s22 * 470296
1171 s12 += s22 * 654183
1172 s13 -= s22 * 997805
1173 s14 += s22 * 136657
1174 s15 -= s22 * 683901
[all …]
|
| /external/boringssl/src/third_party/fiat/ |
| D | curve25519.c | 1088 int64_t s22 = 2097151 & (load_4(s + 57) >> 6); in x25519_sc_reduce() local
1116 s10 += s22 * 666643; in x25519_sc_reduce()
1117 s11 += s22 * 470296; in x25519_sc_reduce()
1118 s12 += s22 * 654183; in x25519_sc_reduce()
1119 s13 -= s22 * 997805; in x25519_sc_reduce()
1120 s14 += s22 * 136657; in x25519_sc_reduce()
1121 s15 -= s22 * 683901; in x25519_sc_reduce()
1122 s22 = 0; in x25519_sc_reduce()
1466 int64_t s22; in sc_muladd() local
1523 s22 = a11 * b11; in sc_muladd()
[all …]
|
| /external/clang/test/CodeGenCXX/ |
| D | catch-undef-behavior.cpp | 490 S2 s22; in test2() local
491 s22 = s21; in test2()
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceRegistersARM32.def | 59 X(Reg_s22, 22, "s22", 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, REGLIST3(RegARM32, s22, d11, q5)) \
83 X(Reg_d11, 11, "d11", 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, REGLIST4(RegARM32, d11, q5, s22, s23)) \
112 …, 5, "q5", 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, REGLIST7(RegARM32, q5, d10, d11, s20, s21, s22, s23)) \
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | fp-encoding.txt | 218 # CHECK: vstmiaeq r0, {s19, s20, s21, s22, s23}
220 # CHECK: vldmiaeq r3, {s18, s19, s20, s21, s22, s23}
229 # CHECK: vldmdbeq r5!, {s21, s22, s23}
252 # CHECK: vldmiaeq r8!, {s21, s22, s23}
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | fp-encoding.txt | 218 # CHECK: vstmiaeq r0, {s19, s20, s21, s22, s23}
220 # CHECK: vldmiaeq r3, {s18, s19, s20, s21, s22, s23}
229 # CHECK: vldmdbeq r5!, {s21, s22, s23}
252 # CHECK: vldmiaeq r8!, {s21, s22, s23}
|