/external/tensorflow/tensorflow/core/lib/core/ |
D | stringpiece_test.cc | 52 StringPiece s31(hola); in TEST() local 53 EXPECT_TRUE(s31.data() == hola.data()); in TEST() 54 EXPECT_EQ(8, s31.size()); in TEST()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | neon-scalar-by-elem-saturating-mul.s | 9 sqdmull s31, h31, v15.h[7] 11 sqdmull d31, s31, v31.s[3]
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D | neon-scalar-dup.s | 14 dup s31, v21.s[2] 41 mov s31, v21.s[2]
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D | neon-scalar-by-elem-saturating-mla.s | 30 sqdmlsl d31, s31, v31.s[2]
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D | basic-a64-diagnostics.s | 1674 fcvtzs w13, s31, #0 1687 fcvtzs x13, s31, #0 1700 fcvtzu w13, s31, #0 1713 fcvtzu x13, s31, #0 1726 scvtf w13, s31, #0 1739 scvtf x13, s31, #0 1752 ucvtf w13, s31, #0 1765 ucvtf x13, s31, #0
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D | basic-a64-instructions.s | 1746 fcmp s31, #0.0 1769 fccmp s1, s31, #0, eq 1771 fccmp s31, s15, #13, cs 1783 fccmpe s1, s31, #0, eq 1785 fccmpe s31, s15, #13, cs 1915 fmadd s3, s5, s6, s31 1917 fmsub s3, s5, s6, s31 1919 fnmadd s3, s5, s6, s31 1921 fnmsub s3, s5, s6, s31 1993 scvtf s31, wzr, #20 [all …]
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/external/llvm/test/MC/AArch64/ |
D | neon-scalar-by-elem-saturating-mul.s | 9 sqdmull s31, h31, v15.h[7] 11 sqdmull d31, s31, v31.s[3]
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D | neon-scalar-dup.s | 14 dup s31, v21.s[2] 41 mov s31, v21.s[2]
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D | neon-scalar-by-elem-saturating-mla.s | 30 sqdmlsl d31, s31, v31.s[2]
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D | basic-a64-diagnostics.s | 1669 fcvtzs w13, s31, #0 1682 fcvtzs x13, s31, #0 1695 fcvtzu w13, s31, #0 1708 fcvtzu x13, s31, #0 1721 scvtf w13, s31, #0 1734 scvtf x13, s31, #0 1747 ucvtf w13, s31, #0 1760 ucvtf x13, s31, #0
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/external/capstone/suite/MC/AArch64/ |
D | neon-scalar-by-elem-saturating-mul.s.cs | 5 0xff,0xbb,0x7f,0x5f = sqdmull s31, h31, v15.h[7] 7 0xff,0xbb,0xbf,0x5f = sqdmull d31, s31, v31.s[3]
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D | neon-scalar-dup.s.cs | 10 0xbf,0x06,0x14,0x5e = dup s31, v21.s[2] 21 0xbf,0x06,0x14,0x5e = dup s31, v21.s[2]
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D | neon-scalar-by-elem-saturating-mla.s.cs | 14 0xff,0x7b,0x9f,0x5f = sqdmlsl d31, s31, v31.s[2]
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D | basic-a64-instructions.s.cs | 682 0xe8,0x23,0x20,0x1e = fcmp s31, #0.0 689 0x20,0x04,0x3f,0x1e = fccmp s1, s31, #0, eq 691 0xed,0x27,0x2f,0x1e = fccmp s31, s15, #13, hs 695 0x30,0x04,0x3f,0x1e = fccmpe s1, s31, #0, eq 697 0xfd,0x27,0x2f,0x1e = fccmpe s31, s15, #13, hs 749 0xa3,0x7c,0x06,0x1f = fmadd s3, s5, s6, s31 751 0xa3,0xfc,0x06,0x1f = fmsub s3, s5, s6, s31 753 0xa3,0x7c,0x26,0x1f = fnmadd s3, s5, s6, s31 755 0xa3,0xfc,0x26,0x1f = fnmsub s3, s5, s6, s31 782 0xff,0xb3,0x02,0x1e = scvtf s31, wzr, #20 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | call-preserved-registers.ll | 109 ; GCN: s_mov_b32 s33, s31 111 ; GCN-NEXT: s_mov_b32 s31, s33 113 %s31 = call i32 asm sideeffect "; def $0", "={s31}"() 115 call void asm sideeffect "; use $0", "{s31}"(i32 %s31)
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/external/clang/test/CodeGen/ |
D | arm-arguments.c | 159 struct s31 { char x; }; argument 160 void f31(struct s31 s) { } in f31()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | invalid-fp-armv8.s | 60 @ V8: error: operand must be a register in range [s0, s31] 64 @ V8: error: operand must be a register in range [s0, s31] 79 @ V8: error: operand must be a register in range [s0, s31]
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/external/vixl/test/aarch64/ |
D | test-api-aarch64.cc | 155 VIXL_CHECK(s31.IsValid()); in TEST() 190 VIXL_CHECK(static_cast<CPURegister>(s31).IsValid()); in TEST() 238 VIXL_CHECK(AreConsecutive(s31, d0, q1)); in TEST() 243 VIXL_CHECK(!AreConsecutive(s31, s1)); in TEST() 258 VIXL_CHECK(AreConsecutive(s30, s31, NoVReg, s2)); in TEST()
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/external/swiftshader/third_party/subzero/src/ |
D | IceRegistersARM32.def | 68 X(Reg_s31, 31, "s31", 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, REGLIST3(RegARM32, s31, d15, q7)) 87 X(Reg_d15, 15, "d15", 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, REGLIST4(RegARM32, d15, q7, s30, s31)) \ 114 …, 7, "q7", 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, REGLIST7(RegARM32, q7, d14, d15, s28, s29, s30, s31)) \
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/SVE/ |
D | insr.s | 70 insr z31.s, s31
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
D | a64-ignored-fields.txt | 8 # CHECK: fcmp s31, #0.0 // encoding: [0xe8,0x23,0x20,0x1e]
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | a64-ignored-fields.txt | 8 # CHECK: fcmp s31, #0.0 // encoding: [0xe8,0x23,0x20,0x1e]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | spill-fold.ll | 63 …19},~{s20},~{s21},~{s22},~{s23},~{s24},~{s25},~{s26},~{s27},~{s28},~{s29},~{s30},~{s31}"() nounwind 73 …19},~{s20},~{s21},~{s22},~{s23},~{s24},~{s25},~{s26},~{s27},~{s28},~{s29},~{s30},~{s31}"() nounwind
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D | remat-float0.ll | 15 …{s18},~{s19},~{s20},~{s21},~{s22},~{s23},~{s24},~{s25},~{s26},~{s27},~{s28},~{s29},~{s30},~{s31}"()
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/external/llvm/test/CodeGen/AArch64/ |
D | remat-float0.ll | 15 …{s18},~{s19},~{s20},~{s21},~{s22},~{s23},~{s24},~{s25},~{s26},~{s27},~{s28},~{s29},~{s30},~{s31}"()
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