Searched refs:s_mul_hi_i32 (Results 1 – 4 of 4) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/ |
| D | sop2.s | 225 s_mul_hi_i32 s5, s101, s2 label
229 s_mul_hi_i32 s5, 0, s2 label
233 s_mul_hi_i32 s5, 0x3f717273, s2 label
237 s_mul_hi_i32 s5, s1, s101 label
241 s_mul_hi_i32 s5, s1, 0 label
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/ |
| D | sop2_gfx9.txt | 15 # GFX9: s_mul_hi_i32 s5, s101, s2 ; encoding: [0x65,0x02,0x85,0x96]
18 # GFX9: s_mul_hi_i32 s5, 0, s2 ; encoding: [0x80,0x02,0x85,0x96]
21 # GFX9: s_mul_hi_i32 s5, 0xaf123456, s2 ; encoding: [0xff,0x02,0x85,0x96,0x56,0x34,0x12,0xaf]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SOPInstructions.td | 507 def S_MUL_HI_I32 : SOP2_32<"s_mul_hi_i32">;
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| /external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
| D | AMDGPUAsmGFX9.rst | 616 s_mul_hi_i32 dst, src0, src1
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