| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | acle-intrinsics.ll | 200 define i32 @sadd16(i32 %a, i32 %b) nounwind {
201 ; CHECK-LABEL: sadd16
202 ; CHECK: sadd16 r0, r0, r1
203 %tmp = call i32 @llvm.arm.sadd16(i32 %a, i32 %b)
450 declare i32 @llvm.arm.sadd16(i32, i32) nounwind
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| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-a32.cc | 93 M(sadd16) \
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| D | test-assembler-cond-rd-rn-rm-t32.cc | 92 M(sadd16) \
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| /external/capstone/suite/MC/ARM/ |
| D | basic-thumb2-instructions.s.cs | 653 0x94,0xfa,0x08,0xf3 = sadd16 r3, r4, r8
691 0x92,0xfa,0x03,0xf1 = sadd16 r1, r2, r3
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| D | basic-arm-instructions.s.cs | 593 0x13,0x1f,0x12,0xe6 = sadd16 r1, r2, r3
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 1636 sadd16 r3, r4, r8
1640 @ CHECK: sadd16 r3, r4, r8 @ encoding: [0x94,0xfa,0x08,0xf3]
1760 sadd16 r1, r2, r3
1766 @ CHECK: sadd16 r1, r2, r3 @ encoding: [0x92,0xfa,0x03,0xf1]
|
| D | basic-arm-instructions.s | 1428 sadd16 r1, r2, r3
1433 @ CHECK: sadd16 r1, r2, r3 @ encoding: [0x13,0x1f,0x12,0xe6]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 2119 sadd16 r3, r4, r8
2123 @ CHECK: sadd16 r3, r4, r8 @ encoding: [0x94,0xfa,0x08,0xf3]
2243 sadd16 r1, r2, r3
2249 @ CHECK: sadd16 r1, r2, r3 @ encoding: [0x92,0xfa,0x03,0xf1]
|
| D | basic-arm-instructions.s | 2172 sadd16 r1, r2, r3
2177 @ CHECK: sadd16 r1, r2, r3 @ encoding: [0x13,0x1f,0x12,0xe6]
|
| /external/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 2071 sadd16 r3, r4, r8
2075 @ CHECK: sadd16 r3, r4, r8 @ encoding: [0x94,0xfa,0x08,0xf3]
2195 sadd16 r1, r2, r3
2201 @ CHECK: sadd16 r1, r2, r3 @ encoding: [0x92,0xfa,0x03,0xf1]
|
| D | basic-arm-instructions.s | 2170 sadd16 r1, r2, r3
2175 @ CHECK: sadd16 r1, r2, r3 @ encoding: [0x13,0x1f,0x12,0xe6]
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 1434 # CHECK: sadd16 r3, r4, r8
1552 # CHECK: sadd16 r1, r2, r3
|
| D | basic-arm-instructions.txt | 1260 # CHECK: sadd16 r1, r2, r3
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 1573 # CHECK: sadd16 r3, r4, r8
1691 # CHECK: sadd16 r1, r2, r3
|
| D | basic-arm-instructions.txt | 1417 # CHECK: sadd16 r1, r2, r3
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 1573 # CHECK: sadd16 r3, r4, r8
1691 # CHECK: sadd16 r1, r2, r3
|
| D | basic-arm-instructions.txt | 1417 # CHECK: sadd16 r1, r2, r3
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 2972 void sadd16(Condition cond, Register rd, Register rn, Register rm);
2973 void sadd16(Register rd, Register rn, Register rm) { sadd16(al, rd, rn, rm); } in sadd16() function
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| D | disasm-aarch32.h | 1048 void sadd16(Condition cond, Register rd, Register rn, Register rm);
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 1956 def t2SADD16 : T2I_pam<0b001, 0b0000, "sadd16">;
|
| D | ARMInstrInfo.td | 3189 def SADD16 : AAI<0b01100001, 0b11110001, "sadd16">;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2229 def t2SADD16 : T2I_pam_intrinsics<0b001, 0b0000, "sadd16", int_arm_sadd16>;
|
| D | ARMInstrInfo.td | 3735 def SADD16 : AAIIntrinsic<0b01100001, 0b11110001, "sadd16", int_arm_sadd16>;
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2161 def t2SADD16 : T2I_pam<0b001, 0b0000, "sadd16">;
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 7750 "\003rrx\003rsb\003rsc\006sadd16\005sadd8\004sasx\003sbc\004sbfx\004sdiv"
8610 …{ 796 /* sadd16 */, ARM::t2SADD16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|…
8611 …{ 796 /* sadd16 */, ARM::SADD16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MC…
|