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Searched refs:sdr_cycle_incr (Results 1 – 1 of 1) sorted by relevance

/external/u-boot/drivers/ddr/marvell/a38x/
Dddr3_training_leveling.c1703 int rl_adll_val, rl_phase_val, sdr_cycle_incr, rd_sample, rd_ready; in mv_ddr_rl_dqs_burst() local
1765 sdr_cycle_incr = i / TAPS_PER_RD_SAMPLE; /* sdr cycle increment */ in mv_ddr_rl_dqs_burst()
1766 rd_sample = cl_val + 2 * sdr_cycle_incr; in mv_ddr_rl_dqs_burst()
1778 sdr_cycle_incr = i % TAPS_PER_RD_SAMPLE; in mv_ddr_rl_dqs_burst()
1779 rl_adll_val = sdr_cycle_incr % MAX_RD_SAMPLES; in mv_ddr_rl_dqs_burst()
1780 rl_phase_val = sdr_cycle_incr / MAX_RD_SAMPLES; in mv_ddr_rl_dqs_burst()
1932 sdr_cycle_incr = i / TAPS_PER_RD_SAMPLE; /* sdr cycle increment */ in mv_ddr_rl_dqs_burst()
1933 rd_sample = cl_val + 2 * sdr_cycle_incr; in mv_ddr_rl_dqs_burst()
1935 min_phase = (rl_min_val[effective_cs] - (sdr_cycle_incr * TAPS_PER_RD_SAMPLE)) % MAX_RD_SAMPLES; in mv_ddr_rl_dqs_burst()
1936 max_phase = (rl_max_val[effective_cs] - (sdr_cycle_incr * TAPS_PER_RD_SAMPLE)) % MAX_RD_SAMPLES; in mv_ddr_rl_dqs_burst()
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