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Searched refs:sel2 (Results 1 – 25 of 39) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dmachine-combiner.ll386 %sel2 = select i1 %cmp2, float %x3, float %sel1
387 ret float %sel2
410 %sel2 = select i1 %cmp2, float %x3, float %sel1
411 ret float %sel2
434 %sel2 = select i1 %cmp2, double %x3, double %sel1
435 ret double %sel2
458 %sel2 = select i1 %cmp2, double %x3, double %sel1
459 ret double %sel2
482 %sel2 = select <4 x i1> %cmp2, <4 x float> %x3, <4 x float> %sel1
483 ret <4 x float> %sel2
[all …]
Dpr22338.ll43 %sel2 = select i1 %cmp2, i32 2, i32 0
46 %shl2 = shl i32 %sext, %sel2
Dcmovcmov.ll277 %sel2 = select i1 %c0, i8 %sel1, i8 %sel0
278 store volatile i8 %sel2, i8* @g8
/external/llvm/test/CodeGen/X86/
Dmachine-combiner.ll381 %sel2 = select i1 %cmp2, float %x3, float %sel1
382 ret float %sel2
405 %sel2 = select i1 %cmp2, float %x3, float %sel1
406 ret float %sel2
429 %sel2 = select i1 %cmp2, double %x3, double %sel1
430 ret double %sel2
453 %sel2 = select i1 %cmp2, double %x3, double %sel1
454 ret double %sel2
477 %sel2 = select <4 x i1> %cmp2, <4 x float> %x3, <4 x float> %sel1
478 ret <4 x float> %sel2
[all …]
Dcmovcmov.ll272 %sel2 = select i1 %c0, i8 %sel1, i8 %sel0
273 store volatile i8 %sel2, i8* @g8
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/
Dbuild-vector-shuffle.ll10 %sel2 = select i1 %0, <32 x i16> undef, <32 x i16> zeroinitializer
11 %1 = bitcast <32 x i16> %sel2 to <16 x i32>
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/
Dpr36362.ll14 %sel2 = select i1 %a, i32 %rem, i32 0
15 ret i32 %sel2
Dzext-bool-add-sub.ll30 %sel2 = select i1 %b, i32 %sel1, i32 %zext
31 ret i32 %sel2
60 %sel2 = select i1 %z, i32 %add2, i32 %sel1
61 ret i32 %sel2
Dlogical-select.ll80 %sel2 = select i1 %cmp2, i32 %d, i32 0
81 %or = or i32 %sel1, %sel2
99 %sel2 = select i1 %cmp2, i32 0, i32 %d
100 %or = or i32 %sel1, %sel2
118 %sel2 = select i1 %cmp2, i32 %d, i32 0
119 %or = or i32 %sel1, %sel2
137 %sel2 = select <2 x i1> %cmp2, <2 x i32> %d, <2 x i32> <i32 0, i32 0>
138 %or = or <2 x i32> %sel1, %sel2
/external/llvm/test/Analysis/Lint/
Dcppeh-catch-intrinsics-clean.ll79 %sel2 = phi i32 [%sel, %lpad], [%sel1, %lpad1]
82 %matches1 = icmp eq i32 %sel2, 0
/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/Lint/
Dcppeh-catch-intrinsics-clean.ll79 %sel2 = phi i32 [%sel, %lpad], [%sel1, %lpad1]
82 %matches1 = icmp eq i32 %sel2, 0
/external/llvm/test/CodeGen/SystemZ/
Dasm-18.ll545 %sel2 = select i1 %cmp2, i32 100, i32 200
547 "=h,r,r"(i32 %sel1, i32 %sel2)
687 %sel2 = select i1 %cmp2, i32 0, i32 1
688 ret i32 %sel2
704 %sel2 = select i1 %cmp2, i32 0, i32 1
705 ret i32 %sel2
723 %sel2 = select i1 %cmp2, i32 0, i32 1
724 store i32 %sel2, i32 *%ptr1
743 %sel2 = select i1 %cmp2, i32 0, i32 1
744 store i32 %sel2, i32 *%ptr1
Dfp-cmp-02.ll148 %sel2 = select i1 %cmp2, double %sel1, double 2.0
149 %sel3 = select i1 %cmp3, double %sel2, double 3.0
Dfp-cmp-01.ll139 %sel2 = select i1 %cmp2, float %sel1, float 2.0
140 %sel3 = select i1 %cmp3, float %sel2, float 3.0
Dint-cmp-05.ll282 %sel2 = select i1 %cmp2, i64 %sel1, i64 2
283 %sel3 = select i1 %cmp3, i64 %sel2, i64 3
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/
Dasm-18.ll549 %sel2 = select i1 %cmp2, i32 100, i32 200
551 "=h,r,r"(i32 %sel1, i32 %sel2)
691 %sel2 = select i1 %cmp2, i32 0, i32 1
692 ret i32 %sel2
708 %sel2 = select i1 %cmp2, i32 0, i32 1
709 ret i32 %sel2
727 %sel2 = select i1 %cmp2, i32 0, i32 1
728 store i32 %sel2, i32 *%ptr1
747 %sel2 = select i1 %cmp2, i32 0, i32 1
748 store i32 %sel2, i32 *%ptr1
Dfp-cmp-02.ll148 %sel2 = select i1 %cmp2, double %sel1, double 2.0
149 %sel3 = select i1 %cmp3, double %sel2, double 3.0
Dint-cmp-05.ll282 %sel2 = select i1 %cmp2, i64 %sel1, i64 2
283 %sel3 = select i1 %cmp3, i64 %sel2, i64 3
/external/python/cpython2/Demo/tix/
Dtixwidgets.py384 sel2 = Tix.Select(w, label='Geeks', allowzero=1, radio=0,
395 sel2.add('eat', text='Eat')
396 sel2.add('prog1', text='Program')
397 sel2.add('prog2', text='Program')
398 sel2.add('prog3', text='Program')
399 sel2.add('sleep', text='Sleep')
402 sel2.pack(side=Tix.LEFT, padx=5, pady=3, fill=Tix.X)
/external/iproute2/tc/
Df_u32.c1096 } sel2 = {}; in u32_parse_opt() local
1099 if (parse_selector(&argc, &argv, &sel2.sel, n)) { in u32_parse_opt()
1103 if (sel2.sel.nkeys != 1) { in u32_parse_opt()
1117 hash = sel2.sel.keys[0].val & sel2.sel.keys[0].mask; in u32_parse_opt()
/external/llvm/test/DebugInfo/Generic/
Dinline-debug-info-multiret.ll104 %sel2 = load i32, i32* %ehselector.slot, !dbg !23
106 %lpad.val3 = insertvalue { i8*, i32 } %lpad.val, i32 %sel2, 1, !dbg !23
Dinline-debug-info.ll122 %sel2 = load i32, i32* %ehselector.slot, !dbg !23
124 %lpad.val3 = insertvalue { i8*, i32 } %lpad.val, i32 %sel2, 1, !dbg !23
/external/swiftshader/third_party/llvm-7.0/llvm/test/DebugInfo/Generic/
Dinline-debug-info-multiret.ll104 %sel2 = load i32, i32* %ehselector.slot, !dbg !23
106 %lpad.val3 = insertvalue { i8*, i32 } %lpad.val, i32 %sel2, 1, !dbg !23
Dinline-debug-info.ll122 %sel2 = load i32, i32* %ehselector.slot, !dbg !23
124 %lpad.val3 = insertvalue { i8*, i32 } %lpad.val, i32 %sel2, 1, !dbg !23
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/X86/
Dpropagate_ir_flags.ll368 %sel2 = select i1 %cmp2, double %load2, double %sub2
371 store double %sel2, double* %idx2, align 8
393 %sel2 = select i1 %cmp2, double %load2, double %sub2
396 store double %sel2, double* %idx2, align 8

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