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Searched refs:seqz (Results 1 – 12 of 12) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/RISCV/
Dget-setcc-result-type.ll10 ; RV32I-NEXT: seqz a1, a1
15 ; RV32I-NEXT: seqz a1, a1
20 ; RV32I-NEXT: seqz a1, a1
25 ; RV32I-NEXT: seqz a1, a1
Dfloat-fcmp.ll85 ; RV32IF-NEXT: seqz a0, a0
102 ; RV32IF-NEXT: seqz a0, a0
119 ; RV32IF-NEXT: seqz a1, a1
200 ; RV32IF-NEXT: seqz a0, a0
Di32-icmp.ll5 ; TODO: check the generated instructions for the equivalent of seqz, snez,
12 ; RV32I-NEXT: seqz a0, a0
Ddouble-fcmp.ll120 ; RV32IFD-NEXT: seqz a0, a0
143 ; RV32IFD-NEXT: seqz a0, a0
166 ; RV32IFD-NEXT: seqz a1, a1
283 ; RV32IFD-NEXT: seqz a0, a0
Dfloat-select-fcmp.ll111 ; RV32IF-NEXT: seqz a0, a0
133 ; RV32IF-NEXT: seqz a0, a0
154 ; RV32IF-NEXT: seqz a0, a0
267 ; RV32IF-NEXT: seqz a0, a0
Ddouble-select-fcmp.ll157 ; RV32IFD-NEXT: seqz a0, a0
187 ; RV32IFD-NEXT: seqz a0, a0
216 ; RV32IFD-NEXT: seqz a0, a0
377 ; RV32IFD-NEXT: seqz a0, a0
Dcalling-conv.ll139 ; RV32I-FPELIM-NEXT: seqz a0, a0
164 ; RV32I-WITHFP-NEXT: seqz a0, a0
247 ; RV32I-FPELIM-NEXT: seqz a0, a0
273 ; RV32I-WITHFP-NEXT: seqz a0, a0
408 ; RV32I-FPELIM-NEXT: seqz a1, a3
433 ; RV32I-WITHFP-NEXT: seqz a1, a3
511 ; RV32I-FPELIM-NEXT: seqz a0, a0
521 ; RV32I-WITHFP-NEXT: seqz a0, a0
849 ; RV32I-FPELIM-NEXT: seqz a0, a0
871 ; RV32I-WITHFP-NEXT: seqz a0, a0
Dfloat-br-fcmp.ll192 ; RV32IF-NEXT: seqz a0, a0
221 ; RV32IF-NEXT: seqz a0, a0
250 ; RV32IF-NEXT: seqz a1, a1
404 ; RV32IF-NEXT: seqz a0, a0
Ddouble-br-fcmp.ll219 ; RV32IFD-NEXT: seqz a0, a0
252 ; RV32IFD-NEXT: seqz a0, a0
285 ; RV32IFD-NEXT: seqz a1, a1
463 ; RV32IFD-NEXT: seqz a0, a0
Darith-with-overflow.ll21 ; RV32I-NEXT: seqz a0, a0
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/RISCV/
Drvi-aliases-valid.s45 # CHECK-ALIAS: seqz t6, ra
46 seqz x31, x1 label
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/
DRISCVInstrInfo.td482 def : InstAlias<"seqz $rd, $rs", (SLTIU GPR:$rd, GPR:$rs, 1)>;