| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | atomic-minmax.ll | 240 ; CHECK-DAG: slw [[SV:[0-9]+]], 4, [[SA]]
241 ; CHECK-DAG: slw [[M:[0-9]+]], [[M2]], [[SA]]
267 ; CHECK-DAG: slw [[SV:[0-9]+]], 4, [[SA]]
268 ; CHECK-DAG: slw [[M:[0-9]+]], [[M2]], [[SA]]
294 ; CHECK-DAG: slw [[SV:[0-9]+]], 4, [[SA]]
295 ; CHECK-DAG: slw [[M:[0-9]+]], [[M2]], [[SA]]
319 ; CHECK-DAG: slw [[SV:[0-9]+]], 4, [[SA]]
320 ; CHECK-DAG: slw [[M:[0-9]+]], [[M2]], [[SA]]
343 ; CHECK-DAG: slw [[SV:[0-9]+]], 4, [[SA]]
344 ; CHECK-DAG: slw [[M:[0-9]+]], [[M1]], [[SA]]
[all …]
|
| D | fast-isel-shifter.ll | 6 ; ELF64: slw
14 ; ELF64: slw
|
| D | PR35812-neg-cmpxchg.ll | 44 ; CHECK-P7: slw 8, 5, 3
45 ; CHECK-P7: slw 9, 4, 3
47 ; CHECK-P7: slw 5, 7, 3
|
| D | shift_mask.ll | 9 ; CHECK-NEXT: slw 3, 3, 4
20 ; CHECK-NEXT: slw 3, 3, 4
31 ; CHECK-NEXT: slw 3, 3, 4
|
| D | funnel-shift-rot.ll | 47 ; CHECK-NEXT: slw 3, 3, 4
139 ; CHECK-NEXT: slw 3, 3, 5
|
| D | funnel-shift.ll | 24 ; CHECK-NEXT: slw 5, 3, 5
137 ; CHECK-NEXT: slw 3, 3, 6
|
| D | optcmp.ll | 27 ; CHECK-NOT: slw.
|
| /external/u-boot/arch/powerpc/lib/ |
| D | _ashldi3.S | 34 slw r3,r3,r5 # MSW = count > 31 ? 0 : MSW << count
37 slw r7,r4,r7 # t2 = count < 32 ? 0 : LSW << (count-32)
39 slw r4,r4,r5 # LSW = LSW << count
|
| D | _ashrdi3.S | 36 slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
40 slw r7,r7,r8 # t2 = (count < 32) ? 0 : t2
|
| D | _lshrdi3.S | 36 slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
|
| /external/llvm/test/CodeGen/PowerPC/ |
| D | fast-isel-shifter.ll | 6 ; ELF64: slw
14 ; ELF64: slw
|
| D | optcmp.ll | 26 ; CHECK-NOT: slw.
|
| /external/capstone/suite/MC/PowerPC/ |
| D | ppc64-encoding.s.cs | 181 0x7c,0x62,0x20,0x30 = slw 2, 3, 4
182 0x7c,0x62,0x20,0x31 = slw. 2, 3, 4
|
| /external/u-boot/arch/arm/mach-tegra/ |
| D | pinmux-common.c | 475 #define pmux_slw_isvalid(slw) \ argument
476 (((slw) >= PMUX_SLWF_MIN) && ((slw) <= PMUX_SLWF_MAX))
|
| /external/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding.s | 786 # CHECK-BE: slw 2, 3, 4 # encoding: [0x7c,0x62,0x20,0x30]
787 # CHECK-LE: slw 2, 3, 4 # encoding: [0x30,0x20,0x62,0x7c]
788 slw 2, 3, 4
789 # CHECK-BE: slw. 2, 3, 4 # encoding: [0x7c,0x62,0x20,0x31]
790 # CHECK-LE: slw. 2, 3, 4 # encoding: [0x31,0x20,0x62,0x7c]
791 slw. 2, 3, 4
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding.s | 874 # CHECK-BE: slw 2, 3, 4 # encoding: [0x7c,0x62,0x20,0x30]
875 # CHECK-LE: slw 2, 3, 4 # encoding: [0x30,0x20,0x62,0x7c]
876 slw 2, 3, 4
877 # CHECK-BE: slw. 2, 3, 4 # encoding: [0x7c,0x62,0x20,0x31]
878 # CHECK-LE: slw. 2, 3, 4 # encoding: [0x31,0x20,0x62,0x7c]
879 slw. 2, 3, 4
|
| /external/llvm/test/MC/Disassembler/PowerPC/ |
| D | ppc64le-encoding.txt | 595 # CHECK: slw 2, 3, 4
598 # CHECK: slw. 2, 3, 4
|
| D | ppc64-encoding.txt | 616 # CHECK: slw 2, 3, 4
619 # CHECK: slw. 2, 3, 4
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
| D | ppc64le-encoding.txt | 607 # CHECK: slw 2, 3, 4
610 # CHECK: slw. 2, 3, 4
|
| D | ppc64-encoding.txt | 652 # CHECK: slw 2, 3, 4
655 # CHECK: slw. 2, 3, 4
|
| /external/libffi/src/powerpc/ |
| D | ppc_closure.S | 317 slw %r6,%r3,%r6
|
| /external/python/cpython2/Modules/_ctypes/libffi/src/powerpc/ |
| D | ppc_closure.S | 317 slw %r6,%r3,%r6
|
| /external/v8/src/ppc/ |
| D | macro-assembler-ppc.cc | 769 slw(dst_high, src_low, scratch); in ShiftLeftPair()
775 slw(dst_high, src_high, shift); in ShiftLeftPair()
778 slw(dst_low, src_low, shift); in ShiftLeftPair()
823 slw(scratch, src_high, scratch); in ShiftRightPair()
869 slw(scratch, src_high, scratch); in ShiftRightAlgPair()
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCSchedule.td | 302 // slw IntGeneral
|
| /external/u-boot/arch/powerpc/cpu/mpc85xx/ |
| D | start.S | 1817 slw r5,r4,r5 /* r5 = cache block size */
1823 slw r7,r7,r6
|