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Searched refs:smlabt (Results 1 – 25 of 36) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dsmul.ll31 ; CHECK: {{smlabt r0, r1, r2, r0|smlatb r0, r2, r1, r0}}
32 ; CHECK-THUMBV6-NOT: {{smlabt|smlatb}}
66 ; CHECK: {{smlatb r0, r1, r2, r0|smlabt r0, r2, r1, r0}}
67 ; CHECK-THUMBV6-NOT: {{smlatb|smlabt}}
218 ; CHECK: {{smlabt r0, r1, r2, r0|smlatb r0, r2, r1, r0}}
219 ; CHECK-THUMBV6-NOT: {{smlabt|smlatb}}
230 ; CHECK: {{smlatb r0, r1, r2, r0|smlabt r0, r2, r1, r0}}
231 ; CHECK-THUMBV6-NOT: {{smlatb|smlabt}}
Dacle-intrinsics-v5.ll53 ; CHECK: smlabt r2, r0, r1, r2
59 %acc2 = call i32 @llvm.arm.smlabt(i32 %a, i32 %b, i32 %acc1)
104 declare i32 @llvm.arm.smlabt(i32, i32, i32) nounwind
/external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/
Dthumb2-smla.ll5 ; CHECK: smlabt r0, r1, r2, r0
/external/webrtc/webrtc/common_audio/signal_processing/
Dfilter_ar_fast_q12_armv7.S67 smlabt r7, r10, r5, r7 @ coefficients[j - 1] * data_out[i - j + 1];
77 smlabt r8, r10, r5, r8 @ sum2 += coefficients[2] * data_out[i - 1];
/external/llvm/test/CodeGen/Thumb2/
Dthumb2-smla.ll6 ; CHECK: smlabt r0, r1, r2, r0
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/
Dthumb2-smla.ll6 ; CHECK: smlabt r0, r1, r2, r0
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dsmul.ll29 ; CHECK: smlabt
/external/llvm/test/CodeGen/ARM/
Dsmul.ll30 ; CHECK: smlabt
60 ; CHECK: smlabt
/external/arm-neon-tests/
Dref_dsp.c296 sres = smlabt(svar1, svar2, sacc); in exec_dsp()
307 sres = smlabt(svar1, svar2, sacc); in exec_dsp()
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dthumb-tests.txt203 # CHECK: smlabt r4, r3, r2, r1
/external/llvm/test/MC/Disassembler/ARM/
Dthumb-tests.txt203 # CHECK: smlabt r4, r3, r2, r1
Dthumb2.txt1748 # CHECK: smlabt r5, r6, r4, r1
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dthumb-tests.txt203 # CHECK: smlabt r4, r3, r2, r1
Dbasic-arm-instructions.txt1421 # CHECK: smlabt r5, r6, r4, r1
Dthumb2.txt1609 # CHECK: smlabt r5, r6, r4, r1
/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions.s.cs642 0xc6,0x14,0x05,0xe1 = smlabt r5, r6, r4, r1
Dbasic-thumb2-instructions.s.cs714 0x16,0xfb,0x14,0x15 = smlabt r5, r6, r4, r1
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dbasic-arm-instructions.s1592 smlabt r5, r6, r4, r1
1601 @ CHECK: smlabt r5, r6, r4, r1 @ encoding: [0xc6,0x14,0x05,0xe1]
Dbasic-thumb2-instructions.s1829 smlabt r5, r6, r4, r1
1839 @ CHECK: smlabt r5, r6, r4, r1 @ encoding: [0x16,0xfb,0x14,0x15]
/external/vixl/src/aarch32/
Dassembler-aarch32.h3057 void smlabt(
3059 void smlabt(Register rd, Register rn, Register rm, Register ra) { in smlabt() function
3060 smlabt(al, rd, rn, rm, ra); in smlabt()
Ddisasm-aarch32.h1088 void smlabt(
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dbasic-thumb2-instructions.s2312 smlabt r5, r6, r4, r1
2322 @ CHECK: smlabt r5, r6, r4, r1 @ encoding: [0x16,0xfb,0x14,0x15]
Dbasic-arm-instructions.s2367 smlabt r5, r6, r4, r1
2376 @ CHECK: smlabt r5, r6, r4, r1 @ encoding: [0xc6,0x14,0x05,0xe1]
/external/llvm/test/MC/ARM/
Dbasic-arm-instructions.s2365 smlabt r5, r6, r4, r1
2374 @ CHECK: smlabt r5, r6, r4, r1 @ encoding: [0xc6,0x14,0x05,0xe1]
Dbasic-thumb2-instructions.s2264 smlabt r5, r6, r4, r1
2274 @ CHECK: smlabt r5, r6, r4, r1 @ encoding: [0x16,0xfb,0x14,0x15]

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