/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | smul.ll | 31 ; CHECK: {{smlabt r0, r1, r2, r0|smlatb r0, r2, r1, r0}} 32 ; CHECK-THUMBV6-NOT: {{smlabt|smlatb}} 66 ; CHECK: {{smlatb r0, r1, r2, r0|smlabt r0, r2, r1, r0}} 67 ; CHECK-THUMBV6-NOT: {{smlatb|smlabt}} 218 ; CHECK: {{smlabt r0, r1, r2, r0|smlatb r0, r2, r1, r0}} 219 ; CHECK-THUMBV6-NOT: {{smlabt|smlatb}} 230 ; CHECK: {{smlatb r0, r1, r2, r0|smlabt r0, r2, r1, r0}} 231 ; CHECK-THUMBV6-NOT: {{smlatb|smlabt}}
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D | acle-intrinsics-v5.ll | 53 ; CHECK: smlabt r2, r0, r1, r2 59 %acc2 = call i32 @llvm.arm.smlabt(i32 %a, i32 %b, i32 %acc1) 104 declare i32 @llvm.arm.smlabt(i32, i32, i32) nounwind
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/external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/ |
D | thumb2-smla.ll | 5 ; CHECK: smlabt r0, r1, r2, r0
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/external/webrtc/webrtc/common_audio/signal_processing/ |
D | filter_ar_fast_q12_armv7.S | 67 smlabt r7, r10, r5, r7 @ coefficients[j - 1] * data_out[i - j + 1]; 77 smlabt r8, r10, r5, r8 @ sum2 += coefficients[2] * data_out[i - 1];
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/external/llvm/test/CodeGen/Thumb2/ |
D | thumb2-smla.ll | 6 ; CHECK: smlabt r0, r1, r2, r0
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/ |
D | thumb2-smla.ll | 6 ; CHECK: smlabt r0, r1, r2, r0
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/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
D | smul.ll | 29 ; CHECK: smlabt
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/external/llvm/test/CodeGen/ARM/ |
D | smul.ll | 30 ; CHECK: smlabt 60 ; CHECK: smlabt
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/external/arm-neon-tests/ |
D | ref_dsp.c | 296 sres = smlabt(svar1, svar2, sacc); in exec_dsp() 307 sres = smlabt(svar1, svar2, sacc); in exec_dsp()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
D | thumb-tests.txt | 203 # CHECK: smlabt r4, r3, r2, r1
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/external/llvm/test/MC/Disassembler/ARM/ |
D | thumb-tests.txt | 203 # CHECK: smlabt r4, r3, r2, r1
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D | thumb2.txt | 1748 # CHECK: smlabt r5, r6, r4, r1
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | thumb-tests.txt | 203 # CHECK: smlabt r4, r3, r2, r1
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D | basic-arm-instructions.txt | 1421 # CHECK: smlabt r5, r6, r4, r1
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D | thumb2.txt | 1609 # CHECK: smlabt r5, r6, r4, r1
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/external/capstone/suite/MC/ARM/ |
D | basic-arm-instructions.s.cs | 642 0xc6,0x14,0x05,0xe1 = smlabt r5, r6, r4, r1
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D | basic-thumb2-instructions.s.cs | 714 0x16,0xfb,0x14,0x15 = smlabt r5, r6, r4, r1
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | basic-arm-instructions.s | 1592 smlabt r5, r6, r4, r1 1601 @ CHECK: smlabt r5, r6, r4, r1 @ encoding: [0xc6,0x14,0x05,0xe1]
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D | basic-thumb2-instructions.s | 1829 smlabt r5, r6, r4, r1 1839 @ CHECK: smlabt r5, r6, r4, r1 @ encoding: [0x16,0xfb,0x14,0x15]
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 3057 void smlabt( 3059 void smlabt(Register rd, Register rn, Register rm, Register ra) { in smlabt() function 3060 smlabt(al, rd, rn, rm, ra); in smlabt()
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D | disasm-aarch32.h | 1088 void smlabt(
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | basic-thumb2-instructions.s | 2312 smlabt r5, r6, r4, r1 2322 @ CHECK: smlabt r5, r6, r4, r1 @ encoding: [0x16,0xfb,0x14,0x15]
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D | basic-arm-instructions.s | 2367 smlabt r5, r6, r4, r1 2376 @ CHECK: smlabt r5, r6, r4, r1 @ encoding: [0xc6,0x14,0x05,0xe1]
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/external/llvm/test/MC/ARM/ |
D | basic-arm-instructions.s | 2365 smlabt r5, r6, r4, r1 2374 @ CHECK: smlabt r5, r6, r4, r1 @ encoding: [0xc6,0x14,0x05,0xe1]
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D | basic-thumb2-instructions.s | 2264 smlabt r5, r6, r4, r1 2274 @ CHECK: smlabt r5, r6, r4, r1 @ encoding: [0x16,0xfb,0x14,0x15]
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