| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | acle-intrinsics.ll | 347 define i32 @smladx(i32 %a, i32 %b, i32 %c) nounwind {
348 ; CHECK-LABEL: smladx
349 ; CHECK: smladx r0, r0, r1, r2
350 %tmp = call i32 @llvm.arm.smladx(i32 %a, i32 %b, i32 %c)
471 declare i32 @llvm.arm.smladx(i32, i32, i32) nounwind
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| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 650 0x33,0x85,0x02,0xe7 = smladx r2, r3, r5, r8
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| D | basic-thumb2-instructions.s.cs | 723 0x23,0xfb,0x15,0x82 = smladx r2, r3, r5, r8
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| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-arm-instructions.s | 1613 smladx r2, r3, r5, r8
1618 @ CHECK: smladx r2, r3, r5, r8 @ encoding: [0x33,0x85,0x02,0xe7]
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| D | basic-thumb2-instructions.s | 1853 smladx r2, r3, r5, r8
1859 @ CHECK: smladx r2, r3, r5, r8 @ encoding: [0x23,0xfb,0x15,0x82]
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3069 void smladx(
3071 void smladx(Register rd, Register rn, Register rm, Register ra) { in smladx() function
3072 smladx(al, rd, rn, rm, ra); in smladx()
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| D | disasm-aarch32.h | 1094 void smladx(
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| D | disasm-aarch32.cc | 2581 void Disassembler::smladx( in smladx() function in vixl::aarch32::Disassembler
21938 smladx(CurrentCond(), in DecodeT32()
63816 smladx(condition, in DecodeA32()
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| D | assembler-aarch32.cc | 9894 void Assembler::smladx( in smladx() function in vixl::aarch32::Assembler
9916 Delegate(kSmladx, &Assembler::smladx, cond, rd, rn, rm, ra); in smladx()
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| D | macro-assembler-aarch32.h | 3578 smladx(cond, rd, rn, rm, ra); in Smladx()
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 2336 smladx r2, r3, r5, r8
2342 @ CHECK: smladx r2, r3, r5, r8 @ encoding: [0x23,0xfb,0x15,0x82]
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| D | basic-arm-instructions.s | 2388 smladx r2, r3, r5, r8
2393 @ CHECK: smladx r2, r3, r5, r8 @ encoding: [0x33,0x85,0x02,0xe7]
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| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2386 smladx r2, r3, r5, r8
2391 @ CHECK: smladx r2, r3, r5, r8 @ encoding: [0x33,0x85,0x02,0xe7]
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| D | basic-thumb2-instructions.s | 2288 smladx r2, r3, r5, r8
2294 @ CHECK: smladx r2, r3, r5, r8 @ encoding: [0x23,0xfb,0x15,0x82]
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| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1442 # CHECK: smladx r2, r3, r5, r8
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| D | thumb2.txt | 1633 # CHECK: smladx r2, r3, r5, r8
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 1772 # CHECK: smladx r2, r3, r5, r8
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| D | basic-arm-instructions.txt | 1594 # CHECK: smladx r2, r3, r5, r8
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1594 # CHECK: smladx r2, r3, r5, r8
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| D | thumb2.txt | 1772 # CHECK: smladx r2, r3, r5, r8
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2653 (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, "smladx",
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2856 def t2SMLADX : T2DualHalfMulAdd<0b010, 0b0001, "smladx", int_arm_smladx>;
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2881 (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, "smladx",
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 7754 "smc\006smlabb\006smlabt\005smlad\006smladx\005smlal\007smlalbb\007smlal"
8680 …{ 1001 /* smladx */, ARM::t2SMLADX, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_…
8681 …{ 1001 /* smladx */, ARM::SMLADX, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_Is…
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| /external/swiftshader/third_party/llvm-7.0/configs/common/include/llvm/IR/ |
| D | IntrinsicEnums.inc | 1174 arm_smladx, // llvm.arm.smladx
|