| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | mul-v4.s | 24 @ ARMV4: smlals r2, r3, r0, r1 @ encoding: [0x90,0x21,0xf3,0xe0]
28 smlals r2,r3,r0,r1 label
|
| D | basic-arm-instructions.s | 2402 smlals r2, r3, r5, r8
2407 @ CHECK: smlals r2, r3, r5, r8 @ encoding: [0x95,0x28,0xf3,0xe0]
|
| /external/llvm/test/MC/ARM/ |
| D | mul-v4.s | 24 @ ARMV4: smlals r2, r3, r0, r1 @ encoding: [0x90,0x21,0xf3,0xe0]
28 smlals r2,r3,r0,r1 label
|
| D | basic-arm-instructions.s | 2400 smlals r2, r3, r5, r8
2405 @ CHECK: smlals r2, r3, r5, r8 @ encoding: [0x95,0x28,0xf3,0xe0]
|
| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 654 0x95,0x28,0xf3,0xe0 = smlals r2, r3, r5, r8
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-arm-instructions.s | 1627 smlals r2, r3, r5, r8
1632 @ CHECK: smlals r2, r3, r5, r8 @ encoding: [0x95,0x28,0xf3,0xe0]
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3105 void smlals(
3107 void smlals(Register rdlo, Register rdhi, Register rn, Register rm) { in smlals() function
3108 smlals(al, rdlo, rdhi, rn, rm); in smlals()
|
| D | disasm-aarch32.h | 1112 void smlals(
|
| D | assembler-aarch32.cc | 10054 void Assembler::smlals( in smlals() function in vixl::aarch32::Assembler
10069 Delegate(kSmlals, &Assembler::smlals, cond, rdlo, rdhi, rn, rm); in smlals()
|
| D | macro-assembler-aarch32.h | 3674 smlals(cond, rdlo, rdhi, rn, rm); in Smlals()
|
| D | disasm-aarch32.cc | 2623 void Disassembler::smlals( in smlals() function in vixl::aarch32::Disassembler
60217 smlals(condition, in DecodeA32()
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1456 # CHECK: smlals r2, r3, r5, r8
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1608 # CHECK: smlals r2, r3, r5, r8
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1608 # CHECK: smlals r2, r3, r5, r8
|