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Searched refs:smlaltb (Results 1 – 25 of 29) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
DlongMAC.ll280 ;CHECK-T2-DSP: smlaltb r2, r3, r0, r1
285 ;CHECK-V5TE: smlaltb r2, r3, r0, r1
290 ;CHECK-V7-LE: smlaltb r2, r3, r0, r1
293 ;CHECK-V7-THUMB-BE: smlaltb r3, r2, r0, r1
296 ;CHECK-LE-NOT: smlaltb
297 ;CHECK-BE-NOT: smlaltb
298 ;CHECK-V6M-THUMB-NOT: smlaltb
299 ;CHECK-V7M-THUMB-NOT: smlaltb
341 ;CHECK-T2-DSP: smlaltb r2, r1, r0, r3
345 ;CHECK-V5TE: smlaltb r2, r1, r0, r3
[all …]
/external/arm-neon-tests/
Dref_dsp.c332 smlaltb(&lo, &hi, svar1, svar2); in exec_dsp()
355 smlaltb(&lo, &hi, svar1, svar2); in exec_dsp()
378 smlaltb(&lo, &hi, svar1, svar2); in exec_dsp()
Dref-rvct-all.txt8024 smlaltb(&0x9abcdef0, &0x12345678, 0x12345678, 0x12345678) = 0x123456780xa0e2df50
8028 smlaltb(&0x9abcdef0, &0x12345678, 0xf123f456, 0xf123f456) = 0x123456780x9b6a3cb2
8032 smlaltb(&0xffffffff, &0x12345678, 0x7fff7fff, 0x7fff7fff) = 0x123456790x3fff0000
/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions.s.cs659 0xa3,0x42,0x42,0xe1 = smlaltb r4, r2, r3, r2
Dbasic-thumb2-instructions.s.cs732 0xc3,0xfb,0xa2,0x42 = smlaltb r4, r2, r3, r2
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dbasic-arm-instructions.s1642 smlaltb r4, r2, r3, r2
1651 @ CHECK: smlaltb r4, r2, r3, r2 @ encoding: [0xa3,0x42,0x42,0xe1]
Dbasic-thumb2-instructions.s1882 smlaltb r4, r2, r3, r2
1892 @ CHECK: smlaltb r4, r2, r3, r2 @ encoding: [0xc3,0xfb,0xa2,0x42]
/external/vixl/src/aarch32/
Dassembler-aarch32.h3111 void smlaltb(
3113 void smlaltb(Register rdlo, Register rdhi, Register rn, Register rm) { in smlaltb() function
3114 smlaltb(al, rdlo, rdhi, rn, rm); in smlaltb()
Ddisasm-aarch32.h1115 void smlaltb(
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dbasic-thumb2-instructions.s2365 smlaltb r4, r2, r3, r2
2375 @ CHECK: smlaltb r4, r2, r3, r2 @ encoding: [0xc3,0xfb,0xa2,0x42]
Dbasic-arm-instructions.s2417 smlaltb r4, r2, r3, r2
2426 @ CHECK: smlaltb r4, r2, r3, r2 @ encoding: [0xa3,0x42,0x42,0xe1]
/external/llvm/test/MC/ARM/
Dbasic-arm-instructions.s2415 smlaltb r4, r2, r3, r2
2424 @ CHECK: smlaltb r4, r2, r3, r2 @ encoding: [0xa3,0x42,0x42,0xe1]
Dbasic-thumb2-instructions.s2317 smlaltb r4, r2, r3, r2
2327 @ CHECK: smlaltb r4, r2, r3, r2 @ encoding: [0xc3,0xfb,0xa2,0x42]
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt1471 # CHECK: smlaltb r4, r2, r3, r2
Dthumb2.txt1662 # CHECK: smlaltb r4, r2, r3, r2
/external/llvm/test/MC/Disassembler/ARM/
Dthumb2.txt1801 # CHECK: smlaltb r4, r2, r3, r2
Dbasic-arm-instructions.txt1623 # CHECK: smlaltb r4, r2, r3, r2
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt1623 # CHECK: smlaltb r4, r2, r3, r2
Dthumb2.txt1801 # CHECK: smlaltb r4, r2, r3, r2
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrThumb2.td2613 (ins rGPR:$Rn,rGPR:$Rm), IIC_iMAC64, "smlaltb", "\t$Ra, $Rd, $Rn, $Rm",
DARMInstrInfo.td3709 IIC_iMAC64, "smlaltb", "\t$RdLo, $RdHi, $Rn, $Rm", []>,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMInstrThumb2.td2814 def t2SMLALTB : T2MlaLong<0b100, 0b1010, "smlaltb">,
DARMInstrInfo.td4325 def SMLALTB : SMLAL<0b01, "smlaltb">;
/external/llvm/lib/Target/ARM/
DARMInstrThumb2.td2841 (ins rGPR:$Rn,rGPR:$Rm), IIC_iMAC64, "smlaltb", "\t$Ra, $Rd, $Rn, $Rm",
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/
DARMGenAsmMatcher.inc7755 "bt\006smlald\007smlaldx\007smlaltb\007smlaltt\006smlatb\006smlatt\006sm"
8693 …{ 1045 /* smlaltb */, ARM::t2SMLALTB, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__Tie0_1_1__Tie1_1_1_…
8694 …{ 1045 /* smlaltb */, ARM::SMLALTB, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__Tie0_1_1__Tie1_1_1__C…

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