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Searched refs:smlatb (Results 1 – 25 of 28) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dsmul.ll31 ; CHECK: {{smlabt r0, r1, r2, r0|smlatb r0, r2, r1, r0}}
32 ; CHECK-THUMBV6-NOT: {{smlabt|smlatb}}
66 ; CHECK: {{smlatb r0, r1, r2, r0|smlabt r0, r2, r1, r0}}
67 ; CHECK-THUMBV6-NOT: {{smlatb|smlabt}}
218 ; CHECK: {{smlabt r0, r1, r2, r0|smlatb r0, r2, r1, r0}}
219 ; CHECK-THUMBV6-NOT: {{smlabt|smlatb}}
230 ; CHECK: {{smlatb r0, r1, r2, r0|smlabt r0, r2, r1, r0}}
231 ; CHECK-THUMBV6-NOT: {{smlatb|smlabt}}
Dacle-intrinsics-v5.ll54 ; CHECK: smlatb r2, r0, r1, r2
60 %acc3 = call i32 @llvm.arm.smlatb(i32 %a, i32 %b, i32 %acc2)
105 declare i32 @llvm.arm.smlatb(i32, i32, i32) nounwind
/external/webrtc/webrtc/common_audio/signal_processing/
Dfilter_ar_fast_q12_armv7.S66 smlatb r7, r10, r5, r7 @ sum1 += coefficients[j] * data_out[i - j];
82 smlatb r7, r10, r5, r7 @ sum1 += coefficients[1] * data_out[i - 1];
95 smlatb r8, r10, r6, r8 @ sum2 += coefficients[1] * data_out[i];
/external/arm-neon-tests/
Dref_dsp.c298 sres = smlatb(svar1, svar2, sacc); in exec_dsp()
309 sres = smlatb(svar1, svar2, sacc); in exec_dsp()
Dref-rvct-all.txt8016 smlatb(0x12345678, 0x12345678, 0x1020304) = 0x7280364
8020 smlatb(0xf123f456, 0xf123f456, 0x1020304) = 0x1af60c6
/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions.s.cs643 0xa2,0x23,0x04,0xe1 = smlatb r4, r2, r3, r2
Dbasic-thumb2-instructions.s.cs715 0x12,0xfb,0x23,0x24 = smlatb r4, r2, r3, r2
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dbasic-arm-instructions.s1593 smlatb r4, r2, r3, r2
1602 @ CHECK: smlatb r4, r2, r3, r2 @ encoding: [0xa2,0x23,0x04,0xe1]
Dbasic-thumb2-instructions.s1830 smlatb r4, r2, r3, r2
1840 @ CHECK: smlatb r4, r2, r3, r2 @ encoding: [0x12,0xfb,0x23,0x24]
/external/vixl/src/aarch32/
Dassembler-aarch32.h3123 void smlatb(
3125 void smlatb(Register rd, Register rn, Register rm, Register ra) { in smlatb() function
3126 smlatb(al, rd, rn, rm, ra); in smlatb()
Ddisasm-aarch32.h1121 void smlatb(
Ddisasm-aarch32.cc2644 void Disassembler::smlatb( in smlatb() function in vixl::aarch32::Disassembler
22150 smlatb(CurrentCond(), in DecodeT32()
56237 smlatb(condition, in DecodeA32()
Dassembler-aarch32.cc10126 void Assembler::smlatb( in smlatb() function in vixl::aarch32::Assembler
10149 Delegate(kSmlatb, &Assembler::smlatb, cond, rd, rn, rm, ra); in smlatb()
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dbasic-thumb2-instructions.s2313 smlatb r4, r2, r3, r2
2323 @ CHECK: smlatb r4, r2, r3, r2 @ encoding: [0x12,0xfb,0x23,0x24]
Dbasic-arm-instructions.s2368 smlatb r4, r2, r3, r2
2377 @ CHECK: smlatb r4, r2, r3, r2 @ encoding: [0xa2,0x23,0x04,0xe1]
/external/llvm/test/MC/ARM/
Dbasic-arm-instructions.s2366 smlatb r4, r2, r3, r2
2375 @ CHECK: smlatb r4, r2, r3, r2 @ encoding: [0xa2,0x23,0x04,0xe1]
Dbasic-thumb2-instructions.s2265 smlatb r4, r2, r3, r2
2275 @ CHECK: smlatb r4, r2, r3, r2 @ encoding: [0x12,0xfb,0x23,0x24]
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt1422 # CHECK: smlatb r4, r2, r3, r2
Dthumb2.txt1610 # CHECK: smlatb r4, r2, r3, r2
/external/llvm/test/MC/Disassembler/ARM/
Dthumb2.txt1749 # CHECK: smlatb r4, r2, r3, r2
Dbasic-arm-instructions.txt1574 # CHECK: smlatb r4, r2, r3, r2
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt1574 # CHECK: smlatb r4, r2, r3, r2
Dthumb2.txt1749 # CHECK: smlatb r4, r2, r3, r2
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMInstrThumb2.td2776 def t2SMLATB : T2FourRegSMLA<0b001, 0b10, "smlatb",
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/
DARMGenAsmMatcher.inc7755 "bt\006smlald\007smlaldx\007smlaltb\007smlaltt\006smlatb\006smlatt\006sm"
8697 …{ 1061 /* smlatb */, ARM::t2SMLATB, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_…
8698 …{ 1061 /* smlatb */, ARM::SMLATB, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_Is…

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