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Searched refs:smmlar (Results 1 – 25 of 27) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Ddsp-mlal.ll10 ; CHECK-NEXT: smmlar r0, {{(r1, r3|r3, r1)}}, r0
13 ; NODSP-NOT: smmlar
142 ; CHECK: smmlar r0, {{(r1, r2|r2, r1)}}, r0
144 ; NODSP-NOT: smmlar
/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions.s.cs682 0x33,0x12,0x54,0xe7 = smmlar r4, r3, r2, r1
Dbasic-thumb2-instructions.s.cs760 0x53,0xfb,0x12,0x14 = smmlar r4, r3, r2, r1
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dbasic-arm-instructions.s1719 smmlar r4, r3, r2, r1
1724 @ CHECK: smmlar r4, r3, r2, r1 @ encoding: [0x33,0x12,0x54,0xe7]
Dbasic-thumb2-instructions.s1969 smmlar r4, r3, r2, r1
1975 @ CHECK: smmlar r4, r3, r2, r1 @ encoding: [0x53,0xfb,0x12,0x14]
/external/vixl/src/aarch32/
Dassembler-aarch32.h3177 void smmlar(
3179 void smmlar(Register rd, Register rn, Register rm, Register ra) { in smmlar() function
3180 smmlar(al, rd, rn, rm, ra); in smmlar()
Ddisasm-aarch32.h1148 void smmlar(
Ddisasm-aarch32.cc2707 void Disassembler::smmlar( in smmlar() function in vixl::aarch32::Disassembler
22325 smmlar(CurrentCond(), in DecodeT32()
64271 smmlar(condition, in DecodeA32()
Dassembler-aarch32.cc10359 void Assembler::smmlar( in smmlar() function in vixl::aarch32::Assembler
10381 Delegate(kSmmlar, &Assembler::smmlar, cond, rd, rn, rm, ra); in smmlar()
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dbasic-thumb2-instructions.s2452 smmlar r4, r3, r2, r1
2458 @ CHECK: smmlar r4, r3, r2, r1 @ encoding: [0x53,0xfb,0x12,0x14]
Dbasic-arm-instructions.s2494 smmlar r4, r3, r2, r1
2499 @ CHECK: smmlar r4, r3, r2, r1 @ encoding: [0x33,0x12,0x54,0xe7]
/external/llvm/test/MC/ARM/
Dbasic-arm-instructions.s2492 smmlar r4, r3, r2, r1
2497 @ CHECK: smmlar r4, r3, r2, r1 @ encoding: [0x33,0x12,0x54,0xe7]
Dbasic-thumb2-instructions.s2404 smmlar r4, r3, r2, r1
2410 @ CHECK: smmlar r4, r3, r2, r1 @ encoding: [0x53,0xfb,0x12,0x14]
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt1548 # CHECK: smmlar r4, r3, r2, r1
Dthumb2.txt1748 # CHECK: smmlar r4, r3, r2, r1
/external/llvm/test/MC/Disassembler/ARM/
Dthumb2.txt1887 # CHECK: smmlar r4, r3, r2, r1
Dbasic-arm-instructions.txt1700 # CHECK: smmlar r4, r3, r2, r1
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt1700 # CHECK: smmlar r4, r3, r2, r1
Dthumb2.txt1887 # CHECK: smmlar r4, r3, r2, r1
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrThumb2.td2409 "smmlar", "\t$Rd, $Rn, $Rm, $Ra", []>,
DARMInstrInfo.td3588 IIC_iMAC32, "smmlar", "\t$Rd, $Rn, $Rm, $Ra", []>,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMInstrThumb2.td2700 def t2SMMLAR: T2FourRegSMMLA<0b101, 0b0001, "smmlar",
DARMInstrInfo.td4193 IIC_iMAC32, "smmlar", "\t$Rd, $Rn, $Rm, $Ra",
/external/llvm/lib/Target/ARM/
DARMInstrThumb2.td2641 "smmlar", "\t$Rd, $Rn, $Rm, $Ra", []>,
DARMInstrInfo.td4004 IIC_iMAC32, "smmlar", "\t$Rd, $Rn, $Rm, $Ra", []>,

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