| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | dsp-mlal.ll | 9 ; CHECK-NEXT: smmulr r0, {{(r0, r2|r2, r0)}}
12 ; NODSP-NOT: smmulr
32 ; CHECK: smmulr r0, {{(r0, r1|r1, r0)}}
34 ; NODSP-NOT: smmulr
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | thumb-tests.txt | 206 # CHECK: smmulr r7, r8, r9
|
| D | basic-arm-instructions.txt | 1728 # CHECK: smmulr r3, r2, r1
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb-tests.txt | 206 # CHECK: smmulr r7, r8, r9
|
| D | basic-arm-instructions.txt | 1728 # CHECK: smmulr r3, r2, r1
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | thumb-tests.txt | 206 # CHECK: smmulr r7, r8, r9
|
| D | basic-arm-instructions.txt | 1576 # CHECK: smmulr r3, r2, r1
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-a32.cc | 68 M(smmulr) \
|
| D | test-assembler-cond-rd-rn-rm-t32.cc | 67 M(smmulr) \
|
| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 690 0x32,0xf1,0x53,0xe7 = smmulr r3, r2, r1
|
| D | basic-thumb2-instructions.s.cs | 770 0x52,0xfb,0x11,0xf3 = smmulr r3, r2, r1
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-arm-instructions.s | 1747 smmulr r3, r2, r1
1752 @ CHECK: smmulr r3, r2, r1 @ encoding: [0x32,0xf1,0x53,0xe7]
|
| D | basic-thumb2-instructions.s | 2001 smmulr r3, r2, r1
2007 @ CHECK: smmulr r3, r2, r1 @ encoding: [0x52,0xfb,0x11,0xf3]
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3198 void smmulr(Condition cond, Register rd, Register rn, Register rm);
3199 void smmulr(Register rd, Register rn, Register rm) { smmulr(al, rd, rn, rm); } in smmulr() function
|
| D | disasm-aarch32.h | 1159 void smmulr(Condition cond, Register rd, Register rn, Register rm);
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 2484 smmulr r3, r2, r1
2490 @ CHECK: smmulr r3, r2, r1 @ encoding: [0x52,0xfb,0x11,0xf3]
|
| D | basic-arm-instructions.s | 2522 smmulr r3, r2, r1
2527 @ CHECK: smmulr r3, r2, r1 @ encoding: [0x32,0xf1,0x53,0xe7]
|
| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2520 smmulr r3, r2, r1
2525 @ CHECK: smmulr r3, r2, r1 @ encoding: [0x32,0xf1,0x53,0xe7]
|
| D | basic-thumb2-instructions.s | 2436 smmulr r3, r2, r1
2442 @ CHECK: smmulr r3, r2, r1 @ encoding: [0x52,0xfb,0x11,0xf3]
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2387 "smmulr", "\t$Rd, $Rn, $Rm", []>,
|
| D | ARMInstrInfo.td | 3575 IIC_iMUL32, "smmulr", "\t$Rd, $Rn, $Rm", []>,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2683 T2SMMUL<0b0001, "smmulr",
|
| D | ARMInstrInfo.td | 4177 IIC_iMUL32, "smmulr", "\t$Rd, $Rn, $Rm",
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2619 "smmulr", "\t$Rd, $Rn, $Rm", []>,
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 7757 "ar\005smmls\006smmlsr\005smmul\006smmulr\005smuad\006smuadx\006smulbb\006"
8723 …{ 1149 /* smmulr */, ARM::t2SMMULR, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2…
8724 …{ 1149 /* smmulr */, ARM::SMMULR, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM|Feat…
|