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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dvsx-partword-int-loads-and-stores.ll8 %splat.splatinsert = insertelement <16 x i8> undef, i8 %0, i32 0
9 …%splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> undef, <16 x i32> zeroinitial…
10 ret <16 x i8> %splat.splat
24 %splat.splatinsert = insertelement <8 x i16> undef, i16 %conv, i32 0
25 …%splat.splat = shufflevector <8 x i16> %splat.splatinsert, <8 x i16> undef, <8 x i32> zeroinitiali…
26 ret <8 x i16> %splat.splat
40 %splat.splatinsert = insertelement <4 x i32> undef, i32 %conv, i32 0
41 …%splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitiali…
42 ret <4 x i32> %splat.splat
56 %splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0
[all …]
Dpower9-moves-and-splats.ll73 %splat.splatinsert = insertelement <4 x i32> undef, i32 %0, i32 0
74 …%splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitiali…
75 ret <4 x i32> %splat.splat
94 %splat.splatinsert = insertelement <4 x float> undef, float %0, i32 0
95 …%splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> zeroinit…
96 ret <4 x float> %splat.splat
119 %splat.splatinsert = insertelement <4 x i32> undef, i32 %0, i32 0
120 …%splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitiali…
121 ret <4 x i32> %splat.splat
144 %splat.splatinsert = insertelement <4 x float> undef, float %0, i32 0
[all …]
Dpr36068.ll12 %splat.splatinsert = insertelement <4 x float> undef, float %a, i32 0
13 …%splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> zeroinit…
15 %mul = fmul <4 x float> %splat.splat, %0
DVSX-XForm-Scalars.ll46 %splat.splatinsert = insertelement <4 x i32> undef, i32 %0, i32 0
47 …%splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitiali…
48 store <4 x i32> %splat.splat, <4 x i32>* @a, align 16
Dscalar_vector_test_3.ll226 %splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0
227 …%splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitiali…
228 ret <2 x i64> %splat.splat
261 %splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0
262 …%splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitiali…
263 ret <2 x i64> %splat.splat
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/Scalarizer/
Dvector-gep.ll47 ;CHECK: %.splat = shufflevector <4 x i16> %.splatinsert, <4 x i16> undef, <4 x i32> zeroinitializer
48 ;CHECK: %.splat[[I0]] = extractelement <4 x i16> %.splat, i32 0
49 ;CHECK: getelementptr i16, i16* %[[I0]], i16 %.splat[[I0]]
50 ;CHECK: %.splat[[I1]] = extractelement <4 x i16> %.splat, i32 1
51 ;CHECK: getelementptr i16, i16* %[[I1]], i16 %.splat[[I1]]
52 ;CHECK: %.splat[[I2]] = extractelement <4 x i16> %.splat, i32 2
53 ;CHECK: getelementptr i16, i16* %[[I2]], i16 %.splat[[I2]]
54 ;CHECK: %.splat[[I3]] = extractelement <4 x i16> %.splat, i32 3
55 ;CHECK: getelementptr i16, i16* %[[I3]], i16 %.splat[[I3]]
72 ;CHECK: %.splat = shufflevector <4 x i16*> %.splatinsert, <4 x i16*> undef, <4 x i32> zeroinitializ…
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/msa/
D3r_splat.ll1 ; Test the MSA splat intrinsics that are encoded with the 3R instruction
15 %1 = tail call <16 x i8> @llvm.mips.splat.b(<16 x i8> %0, i32 %a)
20 declare <16 x i8> @llvm.mips.splat.b(<16 x i8>, i32) nounwind
26 ; MIPS32-DAG: splat.b [[R4:\$w[0-9]+]], [[R3]][$4]
36 %1 = tail call <8 x i16> @llvm.mips.splat.h(<8 x i16> %0, i32 %a)
41 declare <8 x i16> @llvm.mips.splat.h(<8 x i16>, i32) nounwind
47 ; MIPS32-DAG: splat.h [[R4:\$w[0-9]+]], [[R3]][$4]
57 %1 = tail call <4 x i32> @llvm.mips.splat.w(<4 x i32> %0, i32 %a)
62 declare <4 x i32> @llvm.mips.splat.w(<4 x i32>, i32) nounwind
68 ; MIPS32-DAG: splat.w [[R4:\$w[0-9]+]], [[R3]][$4]
[all …]
/external/llvm/test/CodeGen/SystemZ/
Dvec-perm-01.ll1 ; Test vector splat.
5 ; Test v16i8 splat of the first element.
15 ; Test v16i8 splat of the last element.
28 ; Test v16i8 splat of an arbitrary element, using the second operand of
42 ; Test v8i16 splat of the first element.
52 ; Test v8i16 splat of the last element.
63 ; Test v8i16 splat of an arbitrary element, using the second operand of
75 ; Test v4i32 splat of the first element.
85 ; Test v4i32 splat of the last element.
95 ; Test v4i32 splat of an arbitrary element, using the second operand of
[all …]
Dvec-perm-02.ll5 ; Test v16i8 splat of the first element.
17 ; Test v16i8 splat of the last element.
32 ; Test v16i8 splat of an arbitrary element, using the second operand of
48 ; Test v8i16 splat of the first element.
60 ; Test v8i16 splat of the last element.
73 ; Test v8i16 splat of an arbitrary element, using the second operand of
87 ; Test v4i32 splat of the first element.
99 ; Test v4i32 splat of the last element.
111 ; Test v4i32 splat of an arbitrary element, using the second operand of
124 ; Test v2i64 splat of the first element.
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/
Dvec-perm-01.ll1 ; Test vector splat.
5 ; Test v16i8 splat of the first element.
15 ; Test v16i8 splat of the last element.
28 ; Test v16i8 splat of an arbitrary element, using the second operand of
42 ; Test v8i16 splat of the first element.
52 ; Test v8i16 splat of the last element.
63 ; Test v8i16 splat of an arbitrary element, using the second operand of
75 ; Test v4i32 splat of the first element.
85 ; Test v4i32 splat of the last element.
95 ; Test v4i32 splat of an arbitrary element, using the second operand of
[all …]
Dvec-perm-02.ll5 ; Test v16i8 splat of the first element.
17 ; Test v16i8 splat of the last element.
32 ; Test v16i8 splat of an arbitrary element, using the second operand of
48 ; Test v8i16 splat of the first element.
60 ; Test v8i16 splat of the last element.
73 ; Test v8i16 splat of an arbitrary element, using the second operand of
87 ; Test v4i32 splat of the first element.
99 ; Test v4i32 splat of the last element.
111 ; Test v4i32 splat of an arbitrary element, using the second operand of
124 ; Test v2i64 splat of the first element.
[all …]
/external/llvm/test/CodeGen/Mips/msa/
D3r_splat.ll1 ; Test the MSA splat intrinsics that are encoded with the 3R instruction
15 %1 = tail call <16 x i8> @llvm.mips.splat.b(<16 x i8> %0, i32 %a)
20 declare <16 x i8> @llvm.mips.splat.b(<16 x i8>, i32) nounwind
26 ; MIPS32-DAG: splat.b [[R4:\$w[0-9]+]], [[R3]][$4]
36 %1 = tail call <8 x i16> @llvm.mips.splat.h(<8 x i16> %0, i32 %a)
41 declare <8 x i16> @llvm.mips.splat.h(<8 x i16>, i32) nounwind
47 ; MIPS32-DAG: splat.h [[R4:\$w[0-9]+]], [[R3]][$4]
57 %1 = tail call <4 x i32> @llvm.mips.splat.w(<4 x i32> %0, i32 %a)
62 declare <4 x i32> @llvm.mips.splat.w(<4 x i32>, i32) nounwind
68 ; MIPS32-DAG: splat.w [[R4:\$w[0-9]+]], [[R3]][$4]
[all …]
/external/llvm/test/Transforms/InstCombine/
Dfast-math-scalarization.ll8 %splat.splatinsert = insertelement <4 x float> undef, float %0, i32 0
9 …%splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> zeroinit…
10 %splat.splatinsert1 = insertelement <4 x float> undef, float 3.0, i32 0
14 %x.0 = phi <4 x float> [ %splat.splat, %entry ], [ %mul, %for.body ]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/
Dfast-math-scalarization.ll8 %splat.splatinsert = insertelement <4 x float> undef, float %0, i32 0
9 …%splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> zeroinit…
10 %splat.splatinsert1 = insertelement <4 x float> undef, float 3.0, i32 0
14 %x.0 = phi <4 x float> [ %splat.splat, %entry ], [ %mul, %for.body ]
Dvec_shuffle.ll438 ; Math before splat allows replacing constant elements with undef lanes.
592 %splat = shufflevector <2 x i32> %x, <2 x i32> undef, <2 x i32> zeroinitializer
593 %r = urem <2 x i32> %splat, <i32 1, i32 1>
597 ; Test shuffle followed by binop with splat constant for all 18 binop opcodes.
606 %splat = shufflevector <2 x i32> %x, <2 x i32> undef, <2 x i32> zeroinitializer
607 %r = add <2 x i32> %splat, <i32 42, i32 42>
617 %splat = shufflevector <2 x i32> %x, <2 x i32> undef, <2 x i32> zeroinitializer
618 %r = sub <2 x i32> <i32 42, i32 42>, %splat
628 %splat = shufflevector <2 x i32> %x, <2 x i32> undef, <2 x i32> zeroinitializer
629 %r = sub <2 x i32> %splat, <i32 42, i32 42>
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CostModel/X86/
Duniformshift.ll11 %splat = shufflevector <4 x i32> %insert, <4 x i32> undef, <4 x i32> zeroinitializer
12 %ret = shl <4 x i32> %vector , %splat
23 %splat = shufflevector <4 x i32> %insert, <4 x i32> undef, <4 x i32> zeroinitializer
24 %ret = ashr <4 x i32> %vector , %splat
35 %splat = shufflevector <4 x i32> %insert, <4 x i32> undef, <4 x i32> zeroinitializer
36 %ret = lshr <4 x i32> %vector , %splat
Dvshift-ashr-cost.ll468 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %splat = shufflevector <2 x …
469 …NEXT: Cost Model: Found an estimated cost of 4 for instruction: %shift = ashr <2 x i64> %a, %splat
474 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %splat = shufflevector <2 x …
475 …NEXT: Cost Model: Found an estimated cost of 4 for instruction: %shift = ashr <2 x i64> %a, %splat
480 ; XOP-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %splat = shufflevector <2 x …
481 …NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = ashr <2 x i64> %a, %splat
486 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %splat = shufflevector <2…
487 …NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <2 x i64> %a, %splat
492 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %splat = shufflevector <2…
493 …NEXT: Cost Model: Found an estimated cost of 4 for instruction: %shift = ashr <2 x i64> %a, %splat
[all …]
Dvshift-lshr-cost.ll480 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %splat = shufflevector <2 …
481 …NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = lshr <2 x i64> %a, %splat
486 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %splat = shufflevector <2…
487 …NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = lshr <2 x i64> %a, %splat
491 %splat = shufflevector <2 x i64> %insert, <2 x i64> undef, <2 x i32> zeroinitializer
492 %shift = lshr <2 x i64> %a, %splat
499 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %splat = shufflevector <4 x …
500 …NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = lshr <4 x i64> %a, %splat
505 ; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %splat = shufflevector <4 x…
506 …NEXT: Cost Model: Found an estimated cost of 4 for instruction: %shift = lshr <4 x i64> %a, %splat
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dvec3.ll11 %splat = shufflevector <3 x float> %ins, <3 x float> undef, <3 x i32> zeroinitializer
12 %add = fadd <3 x float> %splat, %v
26 %splat = shufflevector <3 x float> %ins, <3 x float> undef, <3 x i32> zeroinitializer
27 %div = fdiv <3 x float> %splat, %v
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstSimplify/
Dshufflevector.ll34 %splat = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> zeroinitializer
35 %shuf = shufflevector <4 x i32> %splat, <4 x i32> undef, <4 x i32> <i32 0, i32 3, i32 2, i32 1>
44 %splat = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> zeroinitializer
45 %shuf = shufflevector <4 x i32> %splat, <4 x i32> undef, <4 x i32> <i32 0, i32 3, i32 2, i32 1>
54 %splat = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> zeroinitializer
55 %shuf = shufflevector <4 x i32> %splat, <4 x i32> %y, <4 x i32> <i32 0, i32 3, i32 2, i32 1>
64 %splat = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> zeroinitializer
65 …%shuf = shufflevector <4 x i32> zeroinitializer, <4 x i32> %splat, <4 x i32> <i32 7, i32 6, i32 5,…
75 %splat = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> zeroinitializer
76 …%shuf = shufflevector <4 x i32> %splat, <4 x i32> undef, <8 x i32> <i32 0, i32 3, i32 2, i32 1, i3…
[all …]
/external/skqp/src/opts/
DSk4px_SSE2.h39 __m128i splat = _mm_set_epi8(15,15,15,15, 11,11,11,11, 7,7,7,7, 3,3,3,3); in alphas() local
40 return Sk16b(_mm_shuffle_epi8(this->fVec, splat)); in alphas()
46 __m128i splat = _mm_set_epi8(3,3,3,3, 2,2,2,2, 1,1,1,1, 0,0,0,0); in Load4Alphas() local
47 return Sk16b(_mm_shuffle_epi8(_mm_cvtsi32_si128(as), splat)); in Load4Alphas()
/external/skia/src/opts/
DSk4px_SSE2.h39 __m128i splat = _mm_set_epi8(15,15,15,15, 11,11,11,11, 7,7,7,7, 3,3,3,3); in alphas() local
40 return Sk16b(_mm_shuffle_epi8(this->fVec, splat)); in alphas()
46 __m128i splat = _mm_set_epi8(3,3,3,3, 2,2,2,2, 1,1,1,1, 0,0,0,0); in Load4Alphas() local
47 return Sk16b(_mm_shuffle_epi8(_mm_cvtsi32_si128(as), splat)); in Load4Alphas()
/external/llvm/test/CodeGen/ARM/
Dvdup.ll336 ; Check that an SPR splat produces a vdup.
342 %splat.splatinsert = insertelement <2 x float> undef, float %conv, i32 0
343 …%splat.splat = shufflevector <2 x float> %splat.splatinsert, <2 x float> undef, <2 x i32> zeroinit…
344 %sub = fsub <2 x float> %splat.splat, %p
352 %splat.splatinsert = insertelement <4 x float> undef, float %conv, i32 0
353 …%splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> zeroinit…
354 %sub = fsub <4 x float> %splat.splat, %p
362 %splat.splatinsert = insertelement <4 x float> undef, float %conv, i32 1
363 …%splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> <i32 1, …
364 %sub = fsub <4 x float> %splat.splat, %p
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dvdup.ll336 ; Check that an SPR splat produces a vdup.
342 %splat.splatinsert = insertelement <2 x float> undef, float %conv, i32 0
343 …%splat.splat = shufflevector <2 x float> %splat.splatinsert, <2 x float> undef, <2 x i32> zeroinit…
344 %sub = fsub <2 x float> %splat.splat, %p
352 %splat.splatinsert = insertelement <4 x float> undef, float %conv, i32 0
353 …%splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> zeroinit…
354 %sub = fsub <4 x float> %splat.splat, %p
362 %splat.splatinsert = insertelement <4 x float> undef, float %conv, i32 1
363 …%splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> <i32 1, …
364 %sub = fsub <4 x float> %splat.splat, %p
/external/llvm/test/CodeGen/X86/
Davx2-vbroadcast.ll914 ; These tests check that a vbroadcast instruction is used when we have a splat
1011 %splat.splatinsert = insertelement <16 x i8> undef, i8 %tmp2, i32 0
1012 …%splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> undef, <16 x i32> zeroinitial…
1013 %tmp3 = bitcast <16 x i8> %splat.splat to <2 x i64>
1030 %splat.splatinsert = insertelement <32 x i8> undef, i8 %tmp2, i32 0
1031 …%splat.splat = shufflevector <32 x i8> %splat.splatinsert, <32 x i8> undef, <32 x i32> zeroinitial…
1032 %tmp3 = bitcast <32 x i8> %splat.splat to <4 x i64>
1049 %splat.splatinsert = insertelement <8 x i16> undef, i16 %tmp2, i32 0
1050 …%splat.splat = shufflevector <8 x i16> %splat.splatinsert, <8 x i16> undef, <8 x i32> zeroinitiali…
1051 %tmp3 = bitcast <8 x i16> %splat.splat to <2 x i64>
[all …]

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