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/external/libhevc/common/arm64/
Dihevc_inter_pred_chroma_vert_w16inp_w16out.s158 sqshrn v0.4h, v0.4s,#6 //right shift
159 sqshrn v30.4h, v7.4s,#6 //right shift
209 sqshrn v30.4h, v30.4s,#6 //right shift
219 sqshrn v28.4h, v28.4s,#6 //right shift
232 sqshrn v26.4h, v26.4s,#6 //right shift
245 sqshrn v24.4h, v24.4s,#6 //right shift
258 sqshrn v30.4h, v30.4s,#6 //right shift
270 sqshrn v28.4h, v28.4s,#6 //right shift
283 sqshrn v26.4h, v26.4s,#6 //right shift
298 sqshrn v24.4h, v24.4s,#6 //right shift
[all …]
Dihevc_inter_pred_chroma_vert_w16inp.s158 sqshrn v0.4h, v0.4s,#6 //right shift
159 sqshrn v30.4h, v7.4s,#6 //right shift
211 sqshrn v30.4h, v30.4s,#6 //right shift
221 sqshrn v28.4h, v28.4s,#6 //right shift
234 sqshrn v26.4h, v26.4s,#6 //right shift
248 sqshrn v24.4h, v24.4s,#6 //right shift
262 sqshrn v30.4h, v30.4s,#6 //right shift
275 sqshrn v28.4h, v28.4s,#6 //right shift
289 sqshrn v26.4h, v26.4s,#6 //right shift
305 sqshrn v24.4h, v24.4s,#6 //right shift
[all …]
Dihevc_inter_pred_filters_luma_vert_w16inp.s185 sqshrn v19.4h, v19.4s,#6
199 sqshrn v20.4h, v20.4s,#6
217 sqshrn v21.4h, v21.4s,#6
242 sqshrn v30.4h, v30.4s,#6
259 sqshrn v19.4h, v19.4s,#6
285 sqshrn v20.4h, v20.4s,#6
305 sqshrn v21.4h, v21.4s,#6
326 sqshrn v30.4h, v30.4s,#6
340 sqshrn v19.4h, v19.4s,#6
353 sqshrn v20.4h, v20.4s,#6
[all …]
Dihevc_deblk_luma_horz.s531 sqshrn v14.8b, v14.8h,#1
564 sqshrn v14.8b, v14.8h,#1
/external/capstone/suite/MC/AArch64/
Dneon-scalar-shift-imm.s.cs25 0xea,0x95,0x0b,0x5f = sqshrn b10, h15, #5
26 0x51,0x95,0x1c,0x5f = sqshrn h17, s10, #4
27 0x52,0x95,0x21,0x5f = sqshrn s18, d10, #31
Dneon-simd-shift.s.cs116 0x20,0x94,0x0d,0x0f = sqshrn v0.8b, v1.8h, #3
117 0x20,0x94,0x1d,0x0f = sqshrn v0.4h, v1.4s, #3
118 0x20,0x94,0x3d,0x0f = sqshrn v0.2s, v1.2d, #3
/external/llvm/test/MC/AArch64/
Dneon-scalar-shift-imm.s124 sqshrn b10, h15, #5
125 sqshrn h17, s10, #4
126 sqshrn s18, d10, #31
Dneon-simd-shift.s332 sqshrn v0.8b, v1.8h, #3
333 sqshrn v0.4h, v1.4s, #3
334 sqshrn v0.2s, v1.2d, #3
Darm64-advsimd.s1368 sqshrn b0, h0, #1
1369 sqshrn h0, s0, #2
1370 sqshrn s0, d0, #3
1417 ; CHECK: sqshrn b0, h0, #1 ; encoding: [0x00,0x94,0x0f,0x5f]
1418 ; CHECK: sqshrn h0, s0, #2 ; encoding: [0x00,0x94,0x1e,0x5f]
1419 ; CHECK: sqshrn s0, d0, #3 ; encoding: [0x00,0x94,0x3d,0x5f]
1512 sqshrn.8b v0, v0, #1
1514 sqshrn.4h v0, v0, #3
1516 sqshrn.2s v0, v0, #5
1684 ; CHECK: sqshrn.8b v0, v0, #1 ; encoding: [0x00,0x94,0x0f,0x0f]
[all …]
Dneon-diagnostics.s1923 sqshrn v0.8b, v1.8b, #3
1924 sqshrn v0.4h, v1.4h, #3
1925 sqshrn v0.2s, v1.2s, #3
5095 sqshrn b10, h15, #99
5096 sqshrn h17, s10, #99
5097 sqshrn s18, d10, #99
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Dneon-scalar-shift-imm.s124 sqshrn b10, h15, #5
125 sqshrn h17, s10, #4
126 sqshrn s18, d10, #31
Dneon-simd-shift.s332 sqshrn v0.8b, v1.8h, #3
333 sqshrn v0.4h, v1.4s, #3
334 sqshrn v0.2s, v1.2d, #3
Darm64-advsimd.s1368 sqshrn b0, h0, #1
1369 sqshrn h0, s0, #2
1370 sqshrn s0, d0, #3
1417 ; CHECK: sqshrn b0, h0, #1 ; encoding: [0x00,0x94,0x0f,0x5f]
1418 ; CHECK: sqshrn h0, s0, #2 ; encoding: [0x00,0x94,0x1e,0x5f]
1419 ; CHECK: sqshrn s0, d0, #3 ; encoding: [0x00,0x94,0x3d,0x5f]
1512 sqshrn.8b v0, v0, #1
1514 sqshrn.4h v0, v0, #3
1516 sqshrn.2s v0, v0, #5
1684 ; CHECK: sqshrn.8b v0, v0, #1 ; encoding: [0x00,0x94,0x0f,0x0f]
[all …]
Dneon-diagnostics.s1928 sqshrn v0.8b, v1.8b, #3
1929 sqshrn v0.4h, v1.4h, #3
1930 sqshrn v0.2s, v1.2s, #3
5035 sqshrn b10, h15, #99
5036 sqshrn h17, s10, #99
5037 sqshrn s18, d10, #99
/external/libhevc/decoder/arm64/
Dihevcd_fmt_conv_420sp_to_rgba8888.s212 sqshrn v5.4h, v5.4s,#13 ////D8 = (U-128)*C4>>13 4 16-BIT VALUES
217 sqshrn v7.4h, v20.4s,#13 ////D10 = (V-128)*C1>>13 4 16-BIT VALUES
222 sqshrn v12.4h, v12.4s,#13 ////D12 = [(U-128)*C2 + (V-128)*C3]>>13 4 16-BIT VALUES
375 sqshrn v5.4h, v5.4s,#13 ////D8 = (U-128)*C4>>13 4 16-BIT VALUES
380 sqshrn v7.4h, v20.4s,#13 ////D10 = (V-128)*C1>>13 4 16-BIT VALUES
385 sqshrn v12.4h, v12.4s,#13 ////D12 = [(U-128)*C2 + (V-128)*C3]>>13 4 16-BIT VALUES
/external/llvm/test/CodeGen/AArch64/
Darm64-neon-simd-shift.ll435 %vqshrn = tail call <8 x i8> @llvm.aarch64.neon.sqshrn.v8i8(<8 x i16> %b, i32 3)
446 %vqshrn = tail call <4 x i16> @llvm.aarch64.neon.sqshrn.v4i16(<4 x i32> %b, i32 9)
458 %vqshrn = tail call <2 x i32> @llvm.aarch64.neon.sqshrn.v2i32(<2 x i64> %b, i32 19)
584 declare <8 x i8> @llvm.aarch64.neon.sqshrn.v8i8(<8 x i16>, i32)
586 declare <4 x i16> @llvm.aarch64.neon.sqshrn.v4i16(<4 x i32>, i32)
588 declare <2 x i32> @llvm.aarch64.neon.sqshrn.v2i32(<2 x i64>, i32)
Darm64-vshift.ll743 ; CHECK: sqshrn {{s[0-9]+}}, d0, #1
744 %tmp = call i32 @llvm.aarch64.neon.sqshrn.i32(i64 %A, i32 1)
750 ;CHECK: sqshrn.8b v0, {{v[0-9]+}}, #1
752 %tmp3 = call <8 x i8> @llvm.aarch64.neon.sqshrn.v8i8(<8 x i16> %tmp1, i32 1)
758 ;CHECK: sqshrn.4h v0, {{v[0-9]+}}, #1
760 %tmp3 = call <4 x i16> @llvm.aarch64.neon.sqshrn.v4i16(<4 x i32> %tmp1, i32 1)
766 ;CHECK: sqshrn.2s v0, {{v[0-9]+}}, #1
768 %tmp3 = call <2 x i32> @llvm.aarch64.neon.sqshrn.v2i32(<2 x i64> %tmp1, i32 1)
778 %tmp3 = call <8 x i8> @llvm.aarch64.neon.sqshrn.v8i8(<8 x i16> %tmp1, i32 1)
788 %tmp3 = call <4 x i16> @llvm.aarch64.neon.sqshrn.v4i16(<4 x i32> %tmp1, i32 1)
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-neon-simd-shift.ll435 %vqshrn = tail call <8 x i8> @llvm.aarch64.neon.sqshrn.v8i8(<8 x i16> %b, i32 3)
446 %vqshrn = tail call <4 x i16> @llvm.aarch64.neon.sqshrn.v4i16(<4 x i32> %b, i32 9)
458 %vqshrn = tail call <2 x i32> @llvm.aarch64.neon.sqshrn.v2i32(<2 x i64> %b, i32 19)
584 declare <8 x i8> @llvm.aarch64.neon.sqshrn.v8i8(<8 x i16>, i32)
586 declare <4 x i16> @llvm.aarch64.neon.sqshrn.v4i16(<4 x i32>, i32)
588 declare <2 x i32> @llvm.aarch64.neon.sqshrn.v2i32(<2 x i64>, i32)
Darm64-vshift.ll743 ; CHECK: sqshrn {{s[0-9]+}}, d0, #1
744 %tmp = call i32 @llvm.aarch64.neon.sqshrn.i32(i64 %A, i32 1)
750 ;CHECK: sqshrn.8b v0, {{v[0-9]+}}, #1
752 %tmp3 = call <8 x i8> @llvm.aarch64.neon.sqshrn.v8i8(<8 x i16> %tmp1, i32 1)
758 ;CHECK: sqshrn.4h v0, {{v[0-9]+}}, #1
760 %tmp3 = call <4 x i16> @llvm.aarch64.neon.sqshrn.v4i16(<4 x i32> %tmp1, i32 1)
766 ;CHECK: sqshrn.2s v0, {{v[0-9]+}}, #1
768 %tmp3 = call <2 x i32> @llvm.aarch64.neon.sqshrn.v2i32(<2 x i64> %tmp1, i32 1)
778 %tmp3 = call <8 x i8> @llvm.aarch64.neon.sqshrn.v8i8(<8 x i16> %tmp1, i32 1)
788 %tmp3 = call <4 x i16> @llvm.aarch64.neon.sqshrn.v4i16(<4 x i32> %tmp1, i32 1)
[all …]
/external/libavc/common/armv8/
Dih264_deblk_luma_av8.s168 sqshrn v29.8b, v28.8h, #1 //
169 sqshrn v28.8b, v10.8h, #1 //Q14 = i_macro_p1
176 sqshrn v31.8b, v30.8h, #1 //
177 sqshrn v30.8b, v4.8h, #1 //Q15 = i_macro_q1
571 sqshrn v24.8b, v24.8h, #1 //((p2 + ((p0 + q0 + 1) >> 1) - (p1 << 1)) >> 1) L
572 sqshrn v25.8b, v26.8h, #1 //((p2 + ((p0 + q0 + 1) >> 1) - (p1 << 1)) >> 1) H
592 sqshrn v18.8b, v18.8h, #1 //((q2 + ((p0 + q0 + 1) >> 1) - (q1 << 1)) >> 1) L
594 sqshrn v19.8b, v20.8h, #1 //((q2 + ((p0 + q0 + 1) >> 1) - (q1 << 1)) >> 1) H
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-advsimd.txt1823 # CHECK: sqshrn b0, h0, #0x7
1824 # CHECK: sqshrn h0, s0, #0xe
1825 # CHECK: sqshrn s0, d0, #0x1d
2087 # CHECK: sqshrn.8b v0, v0, #0x7
2089 # CHECK: sqshrn.4h v0, v0, #0xd
2091 # CHECK: sqshrn.2s v0, v0, #0x1b
Dneon-instructions.txt1018 # CHECK: sqshrn v0.8b, v1.8h, #3
1019 # CHECK: sqshrn v0.4h, v1.4s, #3
1020 # CHECK: sqshrn v0.2s, v1.2d, #3
1918 # CHECK: sqshrn b10, h15, #5
1919 # CHECK: sqshrn h17, s10, #4
1920 # CHECK: sqshrn s18, d10, #31
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/
Darm64-advsimd.txt1823 # CHECK: sqshrn b0, h0, #0x7
1824 # CHECK: sqshrn h0, s0, #0xe
1825 # CHECK: sqshrn s0, d0, #0x1d
2087 # CHECK: sqshrn.8b v0, v0, #0x7
2089 # CHECK: sqshrn.4h v0, v0, #0xd
2091 # CHECK: sqshrn.2s v0, v0, #0x1b
Dneon-instructions.txt1018 # CHECK: sqshrn v0.8b, v1.8h, #3
1019 # CHECK: sqshrn v0.4h, v1.4s, #3
1020 # CHECK: sqshrn v0.2s, v1.2d, #3
1918 # CHECK: sqshrn b10, h15, #5
1919 # CHECK: sqshrn h17, s10, #4
1920 # CHECK: sqshrn s18, d10, #31
/external/vixl/test/test-trace-reference/
Dlog-disasm1433 0x~~~~~~~~~~~~~~~~ 5f0f9781 sqshrn b1, h28, #1
1434 0x~~~~~~~~~~~~~~~~ 5f1694ff sqshrn h31, s7, #10
1435 0x~~~~~~~~~~~~~~~~ 5f289544 sqshrn s4, d10, #24
1436 0x~~~~~~~~~~~~~~~~ 0f23942a sqshrn v10.2s, v1.2d, #29
1437 0x~~~~~~~~~~~~~~~~ 0f1295a3 sqshrn v3.4h, v13.4s, #14
1438 0x~~~~~~~~~~~~~~~~ 0f0994db sqshrn v27.8b, v6.8h, #7

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