/external/libhevc/decoder/arm64/ |
D | ihevcd_fmt_conv_420sp_to_rgba8888.s | 213 sqshrn2 v5.8h, v7.4s,#13 ////D9 = (U-128)*C4>>13 4 16-BIT VALUES 218 sqshrn2 v7.8h, v22.4s,#13 ////D11 = (V-128)*C1>>13 4 16-BIT VALUES 223 sqshrn2 v12.8h, v14.4s,#13 ////D13 = [(U-128)*C2 + (V-128)*C3]>>13 4 16-BIT VALUES 376 sqshrn2 v5.8h, v7.4s,#13 ////D9 = (U-128)*C4>>13 4 16-BIT VALUES 381 sqshrn2 v7.8h, v22.4s,#13 ////D11 = (V-128)*C1>>13 4 16-BIT VALUES 386 sqshrn2 v12.8h, v14.4s,#13 ////D13 = [(U-128)*C2 + (V-128)*C3]>>13 4 16-BIT VALUES
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/external/capstone/suite/MC/AArch64/ |
D | neon-simd-shift.s.cs | 119 0x20,0x94,0x0d,0x4f = sqshrn2 v0.16b, v1.8h, #3 120 0x20,0x94,0x1d,0x4f = sqshrn2 v0.8h, v1.4s, #3 121 0x20,0x94,0x3d,0x4f = sqshrn2 v0.4s, v1.2d, #3
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | neon-simd-shift.s | 335 sqshrn2 v0.16b, v1.8h, #3 336 sqshrn2 v0.8h, v1.4s, #3 337 sqshrn2 v0.4s, v1.2d, #3
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D | arm64-advsimd.s | 1513 sqshrn2.16b v0, v0, #2 1515 sqshrn2.8h v0, v0, #4 1517 sqshrn2.4s v0, v0, #6 1685 ; CHECK: sqshrn2.16b v0, v0, #2 ; encoding: [0x00,0x94,0x0e,0x4f] 1687 ; CHECK: sqshrn2.8h v0, v0, #4 ; encoding: [0x00,0x94,0x1c,0x4f] 1689 ; CHECK: sqshrn2.4s v0, v0, #6 ; encoding: [0x00,0x94,0x3a,0x4f] 1820 sqshrn2 v8.16b, v9.8h, #2 1822 sqshrn2 v6.8h, v7.4s, #4 1824 sqshrn2 v4.4s, v5.2d, #6 1888 ; CHECK: sqshrn2.16b v8, v9, #2 ; encoding: [0x28,0x95,0x0e,0x4f] [all …]
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D | neon-diagnostics.s | 1931 sqshrn2 v0.16b, v1.8h, #17 1932 sqshrn2 v0.8h, v1.4s, #33 1933 sqshrn2 v0.4s, v1.2d, #65
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/external/llvm/test/MC/AArch64/ |
D | neon-simd-shift.s | 335 sqshrn2 v0.16b, v1.8h, #3 336 sqshrn2 v0.8h, v1.4s, #3 337 sqshrn2 v0.4s, v1.2d, #3
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D | arm64-advsimd.s | 1513 sqshrn2.16b v0, v0, #2 1515 sqshrn2.8h v0, v0, #4 1517 sqshrn2.4s v0, v0, #6 1685 ; CHECK: sqshrn2.16b v0, v0, #2 ; encoding: [0x00,0x94,0x0e,0x4f] 1687 ; CHECK: sqshrn2.8h v0, v0, #4 ; encoding: [0x00,0x94,0x1c,0x4f] 1689 ; CHECK: sqshrn2.4s v0, v0, #6 ; encoding: [0x00,0x94,0x3a,0x4f] 1820 sqshrn2 v8.16b, v9.8h, #2 1822 sqshrn2 v6.8h, v7.4s, #4 1824 sqshrn2 v4.4s, v5.2d, #6 1888 ; CHECK: sqshrn2.16b v8, v9, #2 ; encoding: [0x28,0x95,0x0e,0x4f] [all …]
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D | neon-diagnostics.s | 1926 sqshrn2 v0.16b, v1.8h, #17 1927 sqshrn2 v0.8h, v1.4s, #33 1928 sqshrn2 v0.4s, v1.2d, #65
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-neon-simd-shift.ll | 434 ; CHECK: sqshrn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.8h, #3 445 ; CHECK: sqshrn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.4s, #9 456 ; CHECK: sqshrn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.2d, #19
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D | arm64-vshift.ll | 775 ;CHECK: sqshrn2.16b v0, {{v[0-9]+}}, #1 785 ;CHECK: sqshrn2.8h v0, {{v[0-9]+}}, #1 795 ;CHECK: sqshrn2.4s v0, {{v[0-9]+}}, #1
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | arm64-neon-simd-shift.ll | 434 ; CHECK: sqshrn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.8h, #3 445 ; CHECK: sqshrn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.4s, #9 456 ; CHECK: sqshrn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.2d, #19
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D | arm64-vshift.ll | 775 ;CHECK: sqshrn2.16b v0, {{v[0-9]+}}, #1 785 ;CHECK: sqshrn2.8h v0, {{v[0-9]+}}, #1 795 ;CHECK: sqshrn2.4s v0, {{v[0-9]+}}, #1
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/external/libjpeg-turbo/simd/arm64/ |
D | jsimd_neon.S | 1138 sqshrn2 v28.16b, v20.8h, #5 1140 sqshrn2 v29.16b, v21.8h, #5 1142 sqshrn2 v30.16b, v22.8h, #5 1144 sqshrn2 v31.16b, v23.8h, #5
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-advsimd.txt | 2088 # CHECK: sqshrn2.16b v0, v0, #0x6 2090 # CHECK: sqshrn2.8h v0, v0, #0xc 2092 # CHECK: sqshrn2.4s v0, v0, #0x1a
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D | neon-instructions.txt | 1021 # CHECK: sqshrn2 v0.16b, v1.8h, #3 1022 # CHECK: sqshrn2 v0.8h, v1.4s, #3 1023 # CHECK: sqshrn2 v0.4s, v1.2d, #3
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-advsimd.txt | 2088 # CHECK: sqshrn2.16b v0, v0, #0x6 2090 # CHECK: sqshrn2.8h v0, v0, #0xc 2092 # CHECK: sqshrn2.4s v0, v0, #0x1a
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D | neon-instructions.txt | 1021 # CHECK: sqshrn2 v0.16b, v1.8h, #3 1022 # CHECK: sqshrn2 v0.8h, v1.4s, #3 1023 # CHECK: sqshrn2 v0.4s, v1.2d, #3
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/external/v8/src/arm64/ |
D | macro-assembler-arm64.h | 1058 V(sqshrn2, Sqshrn2) \
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D | simulator-arm64.h | 1812 LogicVRegister sqshrn2(VectorFormat vform, LogicVRegister dst,
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D | assembler-arm64.h | 2190 void sqshrn2(const VRegister& vd, const VRegister& vn, int shift);
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/external/vixl/test/test-trace-reference/ |
D | log-disasm | 1439 0x~~~~~~~~~~~~~~~~ 4f0f96ee sqshrn2 v14.16b, v23.8h, #1 1440 0x~~~~~~~~~~~~~~~~ 4f2596d9 sqshrn2 v25.4s, v22.2d, #27 1441 0x~~~~~~~~~~~~~~~~ 4f16959f sqshrn2 v31.8h, v12.4s, #10
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D | log-disasm-colour | 1439 0x~~~~~~~~~~~~~~~~ 4f0f96ee sqshrn2 v14.16b, v23.8h, #1 1440 0x~~~~~~~~~~~~~~~~ 4f2596d9 sqshrn2 v25.4s, v22.2d, #27 1441 0x~~~~~~~~~~~~~~~~ 4f16959f sqshrn2 v31.8h, v12.4s, #10
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D | log-cpufeatures-custom | 1438 0x~~~~~~~~~~~~~~~~ 4f0f96ee sqshrn2 v14.16b, v23.8h, #1 ### {NEON} ### 1439 0x~~~~~~~~~~~~~~~~ 4f2596d9 sqshrn2 v25.4s, v22.2d, #27 ### {NEON} ### 1440 0x~~~~~~~~~~~~~~~~ 4f16959f sqshrn2 v31.8h, v12.4s, #10 ### {NEON} ###
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 1672 __ sqshrn2(v14.V16B(), v23.V8H(), 1); in GenerateTestSequenceNEON() local 1673 __ sqshrn2(v25.V4S(), v22.V2D(), 27); in GenerateTestSequenceNEON() local 1674 __ sqshrn2(v31.V8H(), v12.V4S(), 10); in GenerateTestSequenceNEON() local
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/external/vixl/src/aarch64/ |
D | simulator-aarch64.h | 2680 LogicVRegister sqshrn2(VectorFormat vform,
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