Home
last modified time | relevance | path

Searched refs:srshr (Results 1 – 25 of 44) sorted by relevance

12

/external/capstone/suite/MC/AArch64/
Dneon-simd-shift.s.cs30 0x20,0x24,0x0d,0x0f = srshr v0.8b, v1.8b, #3
31 0x20,0x24,0x1d,0x0f = srshr v0.4h, v1.4h, #3
32 0x20,0x24,0x3d,0x0f = srshr v0.2s, v1.2s, #3
33 0x20,0x24,0x0d,0x4f = srshr v0.16b, v1.16b, #3
34 0x20,0x24,0x1d,0x4f = srshr v0.8h, v1.8h, #3
35 0x20,0x24,0x3d,0x4f = srshr v0.4s, v1.4s, #3
36 0x20,0x24,0x7d,0x4f = srshr v0.2d, v1.2d, #3
Dneon-scalar-shift-imm.s.cs4 0x53,0x26,0x79,0x5f = srshr d19, d18, #7
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Dneon-simd-shift.s83 srshr v0.8b, v1.8b, #3
84 srshr v0.4h, v1.4h, #3
85 srshr v0.2s, v1.2s, #3
86 srshr v0.16b, v1.16b, #3
87 srshr v0.8h, v1.8h, #3
88 srshr v0.4s, v1.4s, #3
89 srshr v0.2d, v1.2d, #3
Dneon-scalar-shift-imm.s22 srshr d19, d18, #7
Darm64-advsimd.s1375 srshr d0, d0, #1 define
1424 ; CHECK: srshr d0, d0, #1 ; encoding: [0x00,0x24,0x7f,0x5f]
1531 srshr.8b v0, v0, #1
1532 srshr.16b v0, v0, #2
1533 srshr.4h v0, v0, #3
1534 srshr.8h v0, v0, #4
1535 srshr.2s v0, v0, #5
1536 srshr.4s v0, v0, #6
1537 srshr.2d v0, v0, #7
1703 ; CHECK: srshr.8b v0, v0, #1 ; encoding: [0x00,0x24,0x0f,0x0f]
[all …]
Dneon-diagnostics.s1515 srshr v0.8b, v1.8h, #3
1516 srshr v0.4h, v1.4s, #3
1517 srshr v0.2s, v1.2d, #3
1518 srshr v0.16b, v1.16b, #9
1519 srshr v0.8h, v1.8h, #17
1520 srshr v0.4s, v1.4s, #33
1521 srshr v0.2d, v1.2d, #65
4873 srshr d19, d18, #99
/external/llvm/test/MC/AArch64/
Dneon-simd-shift.s83 srshr v0.8b, v1.8b, #3
84 srshr v0.4h, v1.4h, #3
85 srshr v0.2s, v1.2s, #3
86 srshr v0.16b, v1.16b, #3
87 srshr v0.8h, v1.8h, #3
88 srshr v0.4s, v1.4s, #3
89 srshr v0.2d, v1.2d, #3
Dneon-scalar-shift-imm.s22 srshr d19, d18, #7
Darm64-advsimd.s1375 srshr d0, d0, #1 define
1424 ; CHECK: srshr d0, d0, #1 ; encoding: [0x00,0x24,0x7f,0x5f]
1531 srshr.8b v0, v0, #1
1532 srshr.16b v0, v0, #2
1533 srshr.4h v0, v0, #3
1534 srshr.8h v0, v0, #4
1535 srshr.2s v0, v0, #5
1536 srshr.4s v0, v0, #6
1537 srshr.2d v0, v0, #7
1703 ; CHECK: srshr.8b v0, v0, #1 ; encoding: [0x00,0x24,0x0f,0x0f]
[all …]
Dneon-diagnostics.s1510 srshr v0.8b, v1.8h, #3
1511 srshr v0.4h, v1.4s, #3
1512 srshr v0.2s, v1.2d, #3
1513 srshr v0.16b, v1.16b, #9
1514 srshr v0.8h, v1.8h, #17
1515 srshr v0.4s, v1.4s, #33
1516 srshr v0.2d, v1.2d, #65
4933 srshr d19, d18, #99
/external/libavc/common/armv8/
Dih264_iquant_itrans_recon_av8.s221 srshr v20.8h, v20.8h, #6
222 srshr v22.8h, v22.8h, #6
415 srshr v20.4h, v20.4h, #6
416 srshr v21.4h, v21.4h, #6
417 srshr v22.4h, v22.4h, #6
418 srshr v23.4h, v23.4h, #6
743 srshr v0.8h, v0.8h, #6
744 srshr v1.8h, v1.8h, #6
745 srshr v2.8h, v2.8h, #6
746 srshr v3.8h, v3.8h, #6
[all …]
Dih264_iquant_itrans_recon_dc_av8.s148 srshr v0.8h, v0.8h, #6
234 srshr v0.8h, v0.8h, #6
361 srshr v0.8h, v0.8h, #6
Dih264_deblk_chroma_av8.s540 srshr v14.8h, v14.8h, #3
541 srshr v16.8h, v16.8h, #3 //(((q0 - p0) << 2) + (p1 - q1) + 4) >> 3)
Dih264_intra_pred_luma_16x16_av8.s462 srshr v0.2s, v0.2s, #6 // i_b = D0[0]
/external/libhevc/common/arm64/
Dihevc_deblk_chroma_horz.s145 srshr v6.8h, v6.8h,#3
Dihevc_deblk_chroma_vert.s160 srshr v6.8h, v4.8h,#3
Dihevc_deblk_luma_horz.s488 srshr v10.8h, v10.8h,#4
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-advsimd.txt1830 # CHECK: srshr d0, d0, #0x3f
2106 # CHECK: srshr.8b v0, v0, #0x7
2107 # CHECK: srshr.16b v0, v0, #0x6
2108 # CHECK: srshr.4h v0, v0, #0xd
2109 # CHECK: srshr.8h v0, v0, #0xc
2110 # CHECK: srshr.2s v0, v0, #0x1b
2111 # CHECK: srshr.4s v0, v0, #0x1a
2112 # CHECK: srshr.2d v0, v0, #0x39
Dneon-instructions.txt792 # CHECK: srshr v0.8b, v1.8b, #3
793 # CHECK: srshr v0.4h, v1.4h, #3
794 # CHECK: srshr v0.2s, v1.2s, #3
795 # CHECK: srshr v0.16b, v1.16b, #3
796 # CHECK: srshr v0.8h, v1.8h, #3
797 # CHECK: srshr v0.4s, v1.4s, #3
798 # CHECK: srshr v0.2d, v1.2d, #3
1828 # CHECK: srshr d19, d18, #7
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/
Darm64-advsimd.txt1830 # CHECK: srshr d0, d0, #0x3f
2106 # CHECK: srshr.8b v0, v0, #0x7
2107 # CHECK: srshr.16b v0, v0, #0x6
2108 # CHECK: srshr.4h v0, v0, #0xd
2109 # CHECK: srshr.8h v0, v0, #0xc
2110 # CHECK: srshr.2s v0, v0, #0x1b
2111 # CHECK: srshr.4s v0, v0, #0x1a
2112 # CHECK: srshr.2d v0, v0, #0x39
Dneon-instructions.txt792 # CHECK: srshr v0.8b, v1.8b, #3
793 # CHECK: srshr v0.4h, v1.4h, #3
794 # CHECK: srshr v0.2s, v1.2s, #3
795 # CHECK: srshr v0.16b, v1.16b, #3
796 # CHECK: srshr v0.8h, v1.8h, #3
797 # CHECK: srshr v0.4s, v1.4s, #3
798 # CHECK: srshr v0.2d, v1.2d, #3
1828 # CHECK: srshr d19, d18, #7
/external/libjpeg-turbo/simd/arm64/
Djsimd_neon.S1240 srshr v20.4s, v20.4s, #\shift
1241 srshr v28.4s, v28.4s, #\shift
1253 srshr v20.4s, v20.4s, #\shift
1254 srshr v30.4s, v30.4s, #\shift
1437 srshr v20.4s, v20.4s, #\shift
1438 srshr v15.4s, v15.4s, #\shift
2540 …srshr v16.8h, v16.8h, #PASS1_BITS /* dataptr[0] = (DCTELEM)DESCALE(tmp10 + tmp11, PASS1…
2541 …srshr v20.8h, v20.8h, #PASS1_BITS /* dataptr[4] = (DCTELEM)DESCALE(tmp10 - tmp11, PASS1…
/external/llvm/test/CodeGen/AArch64/
Darm64-vshift.ll499 ;CHECK: srshr.8b
507 ;CHECK: srshr.4h
515 ;CHECK: srshr.2s
523 ;CHECK: srshr.16b
531 ;CHECK: srshr.8h
539 ;CHECK: srshr.4s
547 ;CHECK: srshr.2d
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-vshift.ll499 ;CHECK: srshr.8b
507 ;CHECK: srshr.4h
515 ;CHECK: srshr.2s
523 ;CHECK: srshr.16b
531 ;CHECK: srshr.8h
539 ;CHECK: srshr.4s
547 ;CHECK: srshr.2d
/external/vixl/test/test-trace-reference/
Dlog-disasm1502 0x~~~~~~~~~~~~~~~~ 5f532655 srshr d21, d18, #45
1503 0x~~~~~~~~~~~~~~~~ 4f092563 srshr v3.16b, v11.16b, #7
1504 0x~~~~~~~~~~~~~~~~ 4f4b2755 srshr v21.2d, v26.2d, #53
1505 0x~~~~~~~~~~~~~~~~ 0f2424ab srshr v11.2s, v5.2s, #28
1506 0x~~~~~~~~~~~~~~~~ 0f142647 srshr v7.4h, v18.4h, #12
1507 0x~~~~~~~~~~~~~~~~ 4f222467 srshr v7.4s, v3.4s, #30
1508 0x~~~~~~~~~~~~~~~~ 0f0a244e srshr v14.8b, v2.8b, #6
1509 0x~~~~~~~~~~~~~~~~ 4f1d2695 srshr v21.8h, v20.8h, #3

12