/external/swiftshader/third_party/LLVM/test/Bitcode/ |
D | sse42_crc32.ll | 9 ; CHECK: i32 @llvm.x86.sse42.crc32.32.8( 10 ; CHECK-NOT: i32 @llvm.x86.sse42.crc32.8( 13 ; CHECK: i32 @llvm.x86.sse42.crc32.32.16( 14 ; CHECK-NOT: i32 @llvm.x86.sse42.crc32.16( 17 ; CHECK: i32 @llvm.x86.sse42.crc32.32.32( 18 ; CHECK-NOT: i32 @llvm.x86.sse42.crc32.32( 21 ; CHECK: i64 @llvm.x86.sse42.crc32.64.8( 22 ; CHECK-NOT: i64 @llvm.x86.sse42.crc64.8( 25 ; CHECK: i64 @llvm.x86.sse42.crc32.64.64( 26 ; CHECK-NOT: i64 @llvm.x86.sse42.crc64.64(
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/external/llvm/test/CodeGen/X86/ |
D | sse42-intrinsics-x86.ll | 12 …%res = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <… 15 declare i32 @llvm.x86.sse42.pcmpestri128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone 31 …%res = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %1, i32 7, <16 x i8> %2, i32 7, i8 7) ; <i3… 48 …%res = call i32 @llvm.x86.sse42.pcmpestria128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; … 51 declare i32 @llvm.x86.sse42.pcmpestria128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone 63 …%res = call i32 @llvm.x86.sse42.pcmpestric128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; … 66 declare i32 @llvm.x86.sse42.pcmpestric128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone 81 …%res = call i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; … 84 declare i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone 99 …%res = call i32 @llvm.x86.sse42.pcmpestris128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; … [all …]
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D | sse42-intrinsics-fast-isel.ll | 5 ; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse42-builtins.c 31 …%res = call i32 @llvm.x86.sse42.pcmpestria128(<16 x i8> %arg0, i32 %a1, <16 x i8> %arg2, i32 %a3, … 34 declare i32 @llvm.x86.sse42.pcmpestria128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone 56 …%res = call i32 @llvm.x86.sse42.pcmpestric128(<16 x i8> %arg0, i32 %a1, <16 x i8> %arg2, i32 %a3, … 59 declare i32 @llvm.x86.sse42.pcmpestric128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone 79 …%res = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %arg0, i32 %a1, <16 x i8> %arg2, i32 %a3, i… 82 declare i32 @llvm.x86.sse42.pcmpestri128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone 100 …%res = call <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8> %arg0, i32 %a1, <16 x i8> %arg2, i32 … 104 declare <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone 130 …%res = call i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8> %arg0, i32 %a1, <16 x i8> %arg2, i32 %a3, … [all …]
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D | sse42-intrinsics-fast-isel-x86_64.ll | 4 ; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse42-builtins.c 12 %res = call i64 @llvm.x86.sse42.crc32.64.8(i64 %a0, i8 %a1) 15 declare i64 @llvm.x86.sse42.crc32.64.8(i64, i8) nounwind readnone 23 %res = call i64 @llvm.x86.sse42.crc32.64.64(i64 %a0, i64 %a1) 26 declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind readnone
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D | sse42.ll | 5 declare i32 @llvm.x86.sse42.crc32.32.8(i32, i8) nounwind 6 declare i32 @llvm.x86.sse42.crc32.32.16(i32, i16) nounwind 7 declare i32 @llvm.x86.sse42.crc32.32.32(i32, i32) nounwind 21 %tmp = call i32 @llvm.x86.sse42.crc32.32.8(i32 %a, i8 %b) 38 %tmp = call i32 @llvm.x86.sse42.crc32.32.16(i32 %a, i16 %b) 55 %tmp = call i32 @llvm.x86.sse42.crc32.32.32(i32 %a, i32 %b)
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D | sse42_64.ll | 3 declare i64 @llvm.x86.sse42.crc32.64.8(i64, i8) nounwind 4 declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind 7 %tmp = call i64 @llvm.x86.sse42.crc32.64.8(i64 %a, i8 %b) 15 %tmp = call i64 @llvm.x86.sse42.crc32.64.64(i64 %a, i64 %b)
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D | function-subtarget-features.ll | 68 %3 = call i32 @llvm.x86.sse42.crc32.32.8(i32 %0, i8 %2) 73 declare i32 @llvm.x86.sse42.crc32.32.8(i32, i8)
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/external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
D | sse42.ll | 1 ; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X32 2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X64 4 declare i32 @llvm.x86.sse42.crc32.32.8(i32, i8) nounwind 5 declare i32 @llvm.x86.sse42.crc32.32.16(i32, i16) nounwind 6 declare i32 @llvm.x86.sse42.crc32.32.32(i32, i32) nounwind 9 %tmp = call i32 @llvm.x86.sse42.crc32.32.8(i32 %a, i8 %b) 20 %tmp = call i32 @llvm.x86.sse42.crc32.32.16(i32 %a, i16 %b) 31 %tmp = call i32 @llvm.x86.sse42.crc32.32.32(i32 %a, i32 %b)
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D | sse42_64.ll | 1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X64 3 declare i64 @llvm.x86.sse42.crc32.64.8(i64, i8) nounwind 4 declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind 7 %tmp = call i64 @llvm.x86.sse42.crc32.64.8(i64 %a, i8 %b) 15 %tmp = call i64 @llvm.x86.sse42.crc32.64.64(i64 %a, i64 %b)
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D | vec_compare-sse4.ll | 2 ; RUN: llc < %s -march=x86 -mattr=-sse42,+sse41 | FileCheck %s -check-prefix=SSE41 3 ; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s -check-prefix=SSE42
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D | widen_conv-3.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
D | sse42-intrinsics-fast-isel.ll | 9 ; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse42-builtins.c 57 …%res = call i32 @llvm.x86.sse42.pcmpestria128(<16 x i8> %arg0, i32 %a1, <16 x i8> %arg2, i32 %a3, … 60 declare i32 @llvm.x86.sse42.pcmpestria128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone 108 …%res = call i32 @llvm.x86.sse42.pcmpestric128(<16 x i8> %arg0, i32 %a1, <16 x i8> %arg2, i32 %a3, … 111 declare i32 @llvm.x86.sse42.pcmpestric128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone 147 …%res = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %arg0, i32 %a1, <16 x i8> %arg2, i32 %a3, i… 150 declare i32 @llvm.x86.sse42.pcmpestri128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone 182 …%res = call <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8> %arg0, i32 %a1, <16 x i8> %arg2, i32 … 186 declare <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone 234 …%res = call i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8> %arg0, i32 %a1, <16 x i8> %arg2, i32 %a3, … [all …]
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D | sse42-intrinsics-fast-isel-x86_64.ll | 6 ; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse42-builtins.c 14 %res = call i64 @llvm.x86.sse42.crc32.64.8(i64 %a0, i8 %a1) 17 declare i64 @llvm.x86.sse42.crc32.64.8(i64, i8) nounwind readnone 25 %res = call i64 @llvm.x86.sse42.crc32.64.64(i64 %a0, i64 %a1) 28 declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind readnone
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D | sse42-intrinsics-x86_64.ll | 6 declare i64 @llvm.x86.sse42.crc32.64.8(i64, i8) nounwind 7 declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind 15 %tmp = call i64 @llvm.x86.sse42.crc32.64.8(i64 %a, i8 %b) 25 %tmp = call i64 @llvm.x86.sse42.crc32.64.64(i64 %a, i64 %b)
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D | sttni.ll | 5 declare i32 @llvm.x86.sse42.pcmpestric128(<16 x i8> %lhs, i32, <16 x i8>, i32, i8) 6 declare i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %lhs, i32, <16 x i8>, i32, i8) 7 declare <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8> %lhs, i32, <16 x i8>, i32, i8) 8 declare i32 @llvm.x86.sse42.pcmpistric128(<16 x i8> %lhs, <16 x i8>, i8) 9 declare i32 @llvm.x86.sse42.pcmpistri128(<16 x i8> %lhs, <16 x i8>, i8) 10 declare <16 x i8> @llvm.x86.sse42.pcmpistrm128(<16 x i8> %lhs, <16 x i8>, i8) 29 …%c = call i32 @llvm.x86.sse42.pcmpestric128(<16 x i8> %lhs, i32 %lhs_len, <16 x i8> %rhs, i32 %rhs… 51 …%idx = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %lhs, i32 %lhs_len, <16 x i8> %rhs, i32 %rh… 103 …%idx = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %lhs, i32 %lhs_len, <16 x i8> %rhs, i32 %rh… 147 …%c = call i32 @llvm.x86.sse42.pcmpestric128(<16 x i8> %lhs, i32 %lhs_len, <16 x i8> %rhs, i32 %rhs… [all …]
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D | sse42-intrinsics-x86.ll | 25 …%res = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <… 28 declare i32 @llvm.x86.sse42.pcmpestri128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone 93 …%res = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %1, i32 7, <16 x i8> %2, i32 7, i8 7) ; <i3… 142 …%res = call i32 @llvm.x86.sse42.pcmpestria128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; … 145 declare i32 @llvm.x86.sse42.pcmpestria128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone 192 …%res = call i32 @llvm.x86.sse42.pcmpestric128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; … 195 declare i32 @llvm.x86.sse42.pcmpestric128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone 242 …%res = call i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; … 245 declare i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone 292 …%res = call i32 @llvm.x86.sse42.pcmpestris128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; … [all …]
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D | sse42-schedule.ll | 133 %1 = call i32 @llvm.x86.sse42.crc32.32.8(i32 %a0, i8 %a1) 135 %3 = call i32 @llvm.x86.sse42.crc32.32.8(i32 %1, i8 %2) 138 declare i32 @llvm.x86.sse42.crc32.32.8(i32, i8) nounwind 252 %1 = call i32 @llvm.x86.sse42.crc32.32.16(i32 %a0, i16 %a1) 254 %3 = call i32 @llvm.x86.sse42.crc32.32.16(i32 %1, i16 %2) 257 declare i32 @llvm.x86.sse42.crc32.32.16(i32, i16) nounwind 371 %1 = call i32 @llvm.x86.sse42.crc32.32.32(i32 %a0, i32 %a1) 373 %3 = call i32 @llvm.x86.sse42.crc32.32.32(i32 %1, i32 %2) 376 declare i32 @llvm.x86.sse42.crc32.32.32(i32, i32) nounwind 490 %1 = call i64 @llvm.x86.sse42.crc32.64.8(i64 %a0, i8 %a1) [all …]
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D | function-subtarget-features.ll | 68 %3 = call i32 @llvm.x86.sse42.crc32.32.8(i32 %0, i8 %2) 73 declare i32 @llvm.x86.sse42.crc32.32.8(i32, i8)
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/external/llvm/test/Transforms/InstCombine/ |
D | x86-crc32-demanded.ll | 9 ; CHECK: tail call i64 @llvm.x86.sse42.crc32.64.64 12 %0 = tail call i64 @llvm.x86.sse42.crc32.64.64(i64 0, i64 4) nounwind 17 declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind readnone
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/external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/ |
D | x86-crc32-demanded.ll | 9 ; CHECK: tail call i64 @llvm.x86.sse42.crc32.64.64 12 %0 = tail call i64 @llvm.x86.sse42.crc32.64.64(i64 0, i64 4) nounwind 17 declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind readnone
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/X86/ |
D | x86-crc32-demanded.ll | 9 ; CHECK: tail call i64 @llvm.x86.sse42.crc32.64.64 12 %0 = tail call i64 @llvm.x86.sse42.crc32.64.64(i64 0, i64 4) nounwind 17 declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind readnone
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/external/skia/src/opts/ |
D | SkOpts_sse42.cpp | 10 #define SK_OPTS_NS sse42 15 hash_fn = sse42::hash_fn; in Init_sse42()
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/external/skqp/src/opts/ |
D | SkOpts_sse42.cpp | 10 #define SK_OPTS_NS sse42 15 hash_fn = sse42::hash_fn; in Init_sse42()
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/external/flac/libFLAC/ |
D | cpu.c | 131 info->ia32.sse42 = (flags_ecx & FLAC__CPUINFO_IA32_CPUID_SSE42) ? true : false; in ia32_cpu_info() 149 dfprintf(stderr, " SSE42 ...... %c\n", info->ia32.sse42 ? 'Y' : 'n'); in ia32_cpu_info() 192 info->x86.sse42 = (flags_ecx & FLAC__CPUINFO_IA32_CPUID_SSE42) ? true : false; in x86_64_cpu_info() 206 dfprintf(stderr, " SSE42 ...... %c\n", info->x86.sse42 ? 'Y' : 'n'); in x86_64_cpu_info()
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/external/flac/libFLAC/include/private/ |
D | cpu.h | 152 FLAC__bool sse42; member 164 FLAC__bool sse42; member
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