/external/llvm/test/MC/AArch64/ |
D | neon-3vdiff.s | 341 ssubw2 v0.8h, v1.8h, v2.16b 342 ssubw2 v0.4s, v1.4s, v2.8h 343 ssubw2 v0.2d, v1.2d, v2.4s
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D | neon-diagnostics.s | 2717 ssubw2 v0.8h, v1.8h, v2.16h 2718 ssubw2 v0.4s, v1.4s, v2.8s 2719 ssubw2 v0.2d, v1.2d, v2.4d
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | neon-3vdiff.s | 341 ssubw2 v0.8h, v1.8h, v2.16b 342 ssubw2 v0.4s, v1.4s, v2.8h 343 ssubw2 v0.2d, v1.2d, v2.4s
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D | neon-diagnostics.s | 2666 ssubw2 v0.8h, v1.8h, v2.16h 2667 ssubw2 v0.4s, v1.4s, v2.8s 2668 ssubw2 v0.2d, v1.2d, v2.4d
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/external/capstone/suite/MC/AArch64/ |
D | neon-3vdiff.s.cs | 117 0x20,0x30,0x22,0x4e = ssubw2 v0.8h, v1.8h, v2.16b 118 0x20,0x30,0x62,0x4e = ssubw2 v0.4s, v1.4s, v2.8h 119 0x20,0x30,0xa2,0x4e = ssubw2 v0.2d, v1.2d, v2.4s
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/external/libavc/common/armv8/ |
D | ih264_iquant_itrans_recon_av8.s | 675 ssubw2 v23.4s, v23.4s, v15.8h 684 ssubw2 v29.4s, v29.4s, v11.8h 688 ssubw2 v23.4s, v23.4s, v21.8h 697 ssubw2 v29.4s, v29.4s, v18.8h
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-vsub.ll | 313 ;CHECK: ssubw2.8h 326 ;CHECK: ssubw2.4s 339 ;CHECK: ssubw2.2d
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D | arm64-neon-3vdiff.ll | 487 ; CHECK: ssubw2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.16b 497 ; CHECK: ssubw2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.8h 507 ; CHECK: ssubw2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.4s
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CostModel/AArch64/ |
D | free-widening-casts.ll | 526 ; CODE: ssubw2 v2.8h, v2.8h, v0.16b 537 ; CODE: ssubw2 v2.4s, v2.4s, v0.8h 548 ; CODE: ssubw2 v2.2d, v2.2d, v0.4s
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | neon-instructions.txt | 1405 # CHECK: ssubw2 v0.8h, v1.8h, v2.16b 1406 # CHECK: ssubw2 v0.4s, v1.4s, v2.8h 1407 # CHECK: ssubw2 v0.2d, v1.2d, v2.4s
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
D | neon-instructions.txt | 1405 # CHECK: ssubw2 v0.8h, v1.8h, v2.16b 1406 # CHECK: ssubw2 v0.4s, v1.4s, v2.8h 1407 # CHECK: ssubw2 v0.2d, v1.2d, v2.4s
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | arm64-neon-3vdiff.ll | 487 ; CHECK: ssubw2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.16b 497 ; CHECK: ssubw2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.8h 507 ; CHECK: ssubw2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.4s
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/external/v8/src/arm64/ |
D | macro-assembler-arm64.h | 466 V(ssubw2, Ssubw2) \
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D | simulator-arm64.h | 1692 LogicVRegister ssubw2(VectorFormat vform, LogicVRegister dst,
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D | assembler-arm64.h | 2097 void ssubw2(const VRegister& vd, const VRegister& vn, const VRegister& vm);
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/external/vixl/test/test-trace-reference/ |
D | log-disasm | 1557 0x~~~~~~~~~~~~~~~~ 4ebc3310 ssubw2 v16.2d, v24.2d, v28.4s 1558 0x~~~~~~~~~~~~~~~~ 4e6f317f ssubw2 v31.4s, v11.4s, v15.8h 1559 0x~~~~~~~~~~~~~~~~ 4e303104 ssubw2 v4.8h, v8.8h, v16.16b
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D | log-disasm-colour | 1557 0x~~~~~~~~~~~~~~~~ 4ebc3310 ssubw2 v16.2d, v24.2d, v28.4s 1558 0x~~~~~~~~~~~~~~~~ 4e6f317f ssubw2 v31.4s, v11.4s, v15.8h 1559 0x~~~~~~~~~~~~~~~~ 4e303104 ssubw2 v4.8h, v8.8h, v16.16b
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D | log-cpufeatures-custom | 1556 0x~~~~~~~~~~~~~~~~ 4ebc3310 ssubw2 v16.2d, v24.2d, v28.4s ### {NEON} ### 1557 0x~~~~~~~~~~~~~~~~ 4e6f317f ssubw2 v31.4s, v11.4s, v15.8h ### {NEON} ### 1558 0x~~~~~~~~~~~~~~~~ 4e303104 ssubw2 v4.8h, v8.8h, v16.16b ### {NEON} ###
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D | log-cpufeatures | 1556 0x~~~~~~~~~~~~~~~~ 4ebc3310 ssubw2 v16.2d, v24.2d, v28.4s // Needs: NEON 1557 0x~~~~~~~~~~~~~~~~ 4e6f317f ssubw2 v31.4s, v11.4s, v15.8h // Needs: NEON 1558 0x~~~~~~~~~~~~~~~~ 4e303104 ssubw2 v4.8h, v8.8h, v16.16b // Needs: NEON
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D | log-cpufeatures-colour | 1556 0x~~~~~~~~~~~~~~~~ 4ebc3310 ssubw2 v16.2d, v24.2d, v28.4s [1;35mNEON[0;m 1557 0x~~~~~~~~~~~~~~~~ 4e6f317f ssubw2 v31.4s, v11.4s, v15.8h [1;35mNEON[0;m 1558 0x~~~~~~~~~~~~~~~~ 4e303104 ssubw2 v4.8h, v8.8h, v16.16b [1;35mNEON[0;m
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 1790 __ ssubw2(v16.V2D(), v24.V2D(), v28.V4S()); in GenerateTestSequenceNEON() local 1791 __ ssubw2(v31.V4S(), v11.V4S(), v15.V8H()); in GenerateTestSequenceNEON() local 1792 __ ssubw2(v4.V8H(), v8.V8H(), v16.V16B()); in GenerateTestSequenceNEON() local
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D | test-cpu-features-aarch64.cc | 1986 TEST_NEON(ssubw2_0, ssubw2(v0.V8H(), v1.V8H(), v2.V16B())) 1987 TEST_NEON(ssubw2_1, ssubw2(v0.V4S(), v1.V4S(), v2.V8H())) 1988 TEST_NEON(ssubw2_2, ssubw2(v0.V2D(), v1.V2D(), v2.V4S()))
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/external/vixl/src/aarch64/ |
D | simulator-aarch64.h | 2458 LogicVRegister ssubw2(VectorFormat vform,
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D | assembler-aarch64.h | 3093 void ssubw2(const VRegister& vd, const VRegister& vn, const VRegister& vm);
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D | macro-assembler-aarch64.h | 2620 V(ssubw2, Ssubw2) \
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