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Searched refs:ssubw2 (Results 1 – 25 of 34) sorted by relevance

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/external/llvm/test/MC/AArch64/
Dneon-3vdiff.s341 ssubw2 v0.8h, v1.8h, v2.16b
342 ssubw2 v0.4s, v1.4s, v2.8h
343 ssubw2 v0.2d, v1.2d, v2.4s
Dneon-diagnostics.s2717 ssubw2 v0.8h, v1.8h, v2.16h
2718 ssubw2 v0.4s, v1.4s, v2.8s
2719 ssubw2 v0.2d, v1.2d, v2.4d
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Dneon-3vdiff.s341 ssubw2 v0.8h, v1.8h, v2.16b
342 ssubw2 v0.4s, v1.4s, v2.8h
343 ssubw2 v0.2d, v1.2d, v2.4s
Dneon-diagnostics.s2666 ssubw2 v0.8h, v1.8h, v2.16h
2667 ssubw2 v0.4s, v1.4s, v2.8s
2668 ssubw2 v0.2d, v1.2d, v2.4d
/external/capstone/suite/MC/AArch64/
Dneon-3vdiff.s.cs117 0x20,0x30,0x22,0x4e = ssubw2 v0.8h, v1.8h, v2.16b
118 0x20,0x30,0x62,0x4e = ssubw2 v0.4s, v1.4s, v2.8h
119 0x20,0x30,0xa2,0x4e = ssubw2 v0.2d, v1.2d, v2.4s
/external/libavc/common/armv8/
Dih264_iquant_itrans_recon_av8.s675 ssubw2 v23.4s, v23.4s, v15.8h
684 ssubw2 v29.4s, v29.4s, v11.8h
688 ssubw2 v23.4s, v23.4s, v21.8h
697 ssubw2 v29.4s, v29.4s, v18.8h
/external/llvm/test/CodeGen/AArch64/
Darm64-vsub.ll313 ;CHECK: ssubw2.8h
326 ;CHECK: ssubw2.4s
339 ;CHECK: ssubw2.2d
Darm64-neon-3vdiff.ll487 ; CHECK: ssubw2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.16b
497 ; CHECK: ssubw2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.8h
507 ; CHECK: ssubw2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.4s
/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CostModel/AArch64/
Dfree-widening-casts.ll526 ; CODE: ssubw2 v2.8h, v2.8h, v0.16b
537 ; CODE: ssubw2 v2.4s, v2.4s, v0.8h
548 ; CODE: ssubw2 v2.2d, v2.2d, v0.4s
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt1405 # CHECK: ssubw2 v0.8h, v1.8h, v2.16b
1406 # CHECK: ssubw2 v0.4s, v1.4s, v2.8h
1407 # CHECK: ssubw2 v0.2d, v1.2d, v2.4s
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt1405 # CHECK: ssubw2 v0.8h, v1.8h, v2.16b
1406 # CHECK: ssubw2 v0.4s, v1.4s, v2.8h
1407 # CHECK: ssubw2 v0.2d, v1.2d, v2.4s
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-neon-3vdiff.ll487 ; CHECK: ssubw2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.16b
497 ; CHECK: ssubw2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.8h
507 ; CHECK: ssubw2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.4s
/external/v8/src/arm64/
Dmacro-assembler-arm64.h466 V(ssubw2, Ssubw2) \
Dsimulator-arm64.h1692 LogicVRegister ssubw2(VectorFormat vform, LogicVRegister dst,
Dassembler-arm64.h2097 void ssubw2(const VRegister& vd, const VRegister& vn, const VRegister& vm);
/external/vixl/test/test-trace-reference/
Dlog-disasm1557 0x~~~~~~~~~~~~~~~~ 4ebc3310 ssubw2 v16.2d, v24.2d, v28.4s
1558 0x~~~~~~~~~~~~~~~~ 4e6f317f ssubw2 v31.4s, v11.4s, v15.8h
1559 0x~~~~~~~~~~~~~~~~ 4e303104 ssubw2 v4.8h, v8.8h, v16.16b
Dlog-disasm-colour1557 0x~~~~~~~~~~~~~~~~ 4ebc3310 ssubw2 v16.2d, v24.2d, v28.4s
1558 0x~~~~~~~~~~~~~~~~ 4e6f317f ssubw2 v31.4s, v11.4s, v15.8h
1559 0x~~~~~~~~~~~~~~~~ 4e303104 ssubw2 v4.8h, v8.8h, v16.16b
Dlog-cpufeatures-custom1556 0x~~~~~~~~~~~~~~~~ 4ebc3310 ssubw2 v16.2d, v24.2d, v28.4s ### {NEON} ###
1557 0x~~~~~~~~~~~~~~~~ 4e6f317f ssubw2 v31.4s, v11.4s, v15.8h ### {NEON} ###
1558 0x~~~~~~~~~~~~~~~~ 4e303104 ssubw2 v4.8h, v8.8h, v16.16b ### {NEON} ###
Dlog-cpufeatures1556 0x~~~~~~~~~~~~~~~~ 4ebc3310 ssubw2 v16.2d, v24.2d, v28.4s // Needs: NEON
1557 0x~~~~~~~~~~~~~~~~ 4e6f317f ssubw2 v31.4s, v11.4s, v15.8h // Needs: NEON
1558 0x~~~~~~~~~~~~~~~~ 4e303104 ssubw2 v4.8h, v8.8h, v16.16b // Needs: NEON
Dlog-cpufeatures-colour1556 0x~~~~~~~~~~~~~~~~ 4ebc3310 ssubw2 v16.2d, v24.2d, v28.4s NEON
1557 0x~~~~~~~~~~~~~~~~ 4e6f317f ssubw2 v31.4s, v11.4s, v15.8h NEON
1558 0x~~~~~~~~~~~~~~~~ 4e303104 ssubw2 v4.8h, v8.8h, v16.16b NEON
/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc1790 __ ssubw2(v16.V2D(), v24.V2D(), v28.V4S()); in GenerateTestSequenceNEON() local
1791 __ ssubw2(v31.V4S(), v11.V4S(), v15.V8H()); in GenerateTestSequenceNEON() local
1792 __ ssubw2(v4.V8H(), v8.V8H(), v16.V16B()); in GenerateTestSequenceNEON() local
Dtest-cpu-features-aarch64.cc1986 TEST_NEON(ssubw2_0, ssubw2(v0.V8H(), v1.V8H(), v2.V16B()))
1987 TEST_NEON(ssubw2_1, ssubw2(v0.V4S(), v1.V4S(), v2.V8H()))
1988 TEST_NEON(ssubw2_2, ssubw2(v0.V2D(), v1.V2D(), v2.V4S()))
/external/vixl/src/aarch64/
Dsimulator-aarch64.h2458 LogicVRegister ssubw2(VectorFormat vform,
Dassembler-aarch64.h3093 void ssubw2(const VRegister& vd, const VRegister& vn, const VRegister& vm);
Dmacro-assembler-aarch64.h2620 V(ssubw2, Ssubw2) \

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