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Searched refs:stencil_write_mask (Results 1 – 9 of 9) sorted by relevance

/external/mesa3d/src/intel/vulkan/
Dgen8_cmd_buffer.c462 .StencilWriteMask = d->stencil_write_mask.front & 0xff, in genX()
465 .BackfaceStencilWriteMask = d->stencil_write_mask.back & 0xff, in genX()
468 (d->stencil_write_mask.front || d->stencil_write_mask.back) && in genX()
512 .StencilWriteMask = d->stencil_write_mask.front & 0xff, in genX()
515 .BackfaceStencilWriteMask = d->stencil_write_mask.back & 0xff, in genX()
521 (d->stencil_write_mask.front || d->stencil_write_mask.back) && in genX()
Dgen7_cmd_buffer.c208 .StencilWriteMask = d->stencil_write_mask.front & 0xff, in genX()
211 .BackfaceStencilWriteMask = d->stencil_write_mask.back & 0xff, in genX()
214 (d->stencil_write_mask.front || d->stencil_write_mask.back) && in genX()
Danv_cmd_buffer.c66 .stencil_write_mask = {
109 dest->stencil_write_mask = src->stencil_write_mask; in anv_dynamic_state_copy()
482 cmd_buffer->state.gfx.dynamic.stencil_write_mask.front = writeMask; in anv_CmdSetStencilWriteMask()
484 cmd_buffer->state.gfx.dynamic.stencil_write_mask.back = writeMask; in anv_CmdSetStencilWriteMask()
Danv_pipeline.c1179 dynamic->stencil_write_mask.front = in copy_non_dynamic_state()
1181 dynamic->stencil_write_mask.back = in copy_non_dynamic_state()
Danv_private.h1618 } stencil_write_mask; member
/external/mesa3d/src/amd/vulkan/
Dradv_cmd_buffer.c71 .stencil_write_mask = {
157 if (memcmp(&dest->stencil_write_mask, &src->stencil_write_mask, in radv_bind_dynamic_state()
158 sizeof(src->stencil_write_mask))) { in radv_bind_dynamic_state()
159 dest->stencil_write_mask = src->stencil_write_mask; in radv_bind_dynamic_state()
1190 S_028430_STENCILWRITEMASK(d->stencil_write_mask.front) | in radv_emit_stencil()
1195 S_028434_STENCILWRITEMASK_BF(d->stencil_write_mask.back) | in radv_emit_stencil()
2898 cmd_buffer->state.dynamic.stencil_write_mask.front = writeMask; in radv_CmdSetStencilWriteMask()
2900 cmd_buffer->state.dynamic.stencil_write_mask.back = writeMask; in radv_CmdSetStencilWriteMask()
Dradv_pipeline.c1139 dynamic->stencil_write_mask.front = in radv_pipeline_init_dynamic_state()
1141 dynamic->stencil_write_mask.back = in radv_pipeline_init_dynamic_state()
Dradv_private.h857 } stencil_write_mask; member
/external/mesa3d/src/gallium/drivers/vc5/
Dvc5_state.c186 config.stencil_write_mask = front->writemask; in vc5_create_depth_stencil_alpha_state()
203 config.stencil_write_mask = back->writemask; in vc5_create_depth_stencil_alpha_state()