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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dldaex-stlex.ll70 %res = call i32 @llvm.arm.stlex.p0i8(i32 %extval, i8* %addr)
79 %res = call i32 @llvm.arm.stlex.p0i16(i32 %extval, i16* %addr)
84 ; CHECK: stlex r0, r1, [r2]
86 %res = call i32 @llvm.arm.stlex.p0i32(i32 %val, i32* %addr)
90 declare i32 @llvm.arm.stlex.p0i8(i32, i8*) nounwind
91 declare i32 @llvm.arm.stlex.p0i16(i32, i16*) nounwind
92 declare i32 @llvm.arm.stlex.p0i32(i32, i32*) nounwind
Datomic-ops-v8.ll70 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
262 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
454 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
547 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r0, [r[[ADDR]]]
761 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r[[NEW]], [r[[ADDR]]]
874 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r[[NEW]], [r[[ADDR]]]
987 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r[[NEW]], [r[[ADDR]]]
1118 ; CHECK: stlex [[STATUS:r[0-9]+]], r1, [r[[ADDR]]]
/external/llvm/test/CodeGen/ARM/
Dldaex-stlex.ll70 %res = call i32 @llvm.arm.stlex.p0i8(i32 %extval, i8* %addr)
79 %res = call i32 @llvm.arm.stlex.p0i16(i32 %extval, i16* %addr)
84 ; CHECK: stlex r0, r1, [r2]
86 %res = call i32 @llvm.arm.stlex.p0i32(i32 %val, i32* %addr)
90 declare i32 @llvm.arm.stlex.p0i8(i32, i8*) nounwind
91 declare i32 @llvm.arm.stlex.p0i16(i32, i16*) nounwind
92 declare i32 @llvm.arm.stlex.p0i32(i32, i32*) nounwind
Datomic-ops-v8.ll70 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
262 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
454 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
547 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r0, [r[[ADDR]]]
761 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r[[NEW]], [r[[ADDR]]]
874 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r[[NEW]], [r[[ADDR]]]
987 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r[[NEW]], [r[[ADDR]]]
1116 ; CHECK: stlex [[STATUS:r[0-9]+]], r1, [r[[ADDR]]]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dload-store-acquire-release-v8.s19 stlex r2, r1, [r7]
23 @ CHECK: stlex r2, r1, [r7] @ encoding: [0x91,0x2e,0x87,0xe1]
Dload-store-acquire-release-v8-thumb.s19 stlex r2, r1, [r7]
23 @ CHECK: stlex r2, r1, [r7] @ encoding: [0xc7,0xe8,0xe2,0x1f]
Dthumbv8m.s130 stlex r1, r2, [r3] label
/external/llvm/test/MC/ARM/
Dload-store-acquire-release-v8.s19 stlex r2, r1, [r7]
23 @ CHECK: stlex r2, r1, [r7] @ encoding: [0x91,0x2e,0x87,0xe1]
Dload-store-acquire-release-v8-thumb.s19 stlex r2, r1, [r7]
23 @ CHECK: stlex r2, r1, [r7] @ encoding: [0xc7,0xe8,0xe2,0x1f]
Dthumbv8m.s130 stlex r1, r2, [r3] label
/external/capstone/suite/MC/ARM/
Dload-store-acquire-release-v8-thumb.s.cs8 0xc7,0xe8,0xe2,0x1f = stlex r2, r1, [r7]
Dload-store-acquire-release-v8.s.cs8 0x91,0x2e,0x87,0xe1 = stlex r2, r1, [r7]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/AtomicExpand/ARM/
Datomic-expansion-v8.ll30 ; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlex.p0i16(i32 [[NEWVAL32]], i16* %ptr)
98 ; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlex.p0i8(i32 [[NEWVAL32]], i8* %ptr)
136 ; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlex.p0i16(i32 [[NEWVAL32]], i16* %ptr)
/external/llvm/test/Transforms/AtomicExpand/ARM/
Datomic-expansion-v8.ll30 ; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlex.p0i16(i32 [[NEWVAL32]], i16* %ptr)
98 ; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlex.p0i8(i32 [[NEWVAL32]], i8* %ptr)
136 ; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlex.p0i16(i32 [[NEWVAL32]], i16* %ptr)
/external/llvm/test/MC/Disassembler/ARM/
Dload-store-acquire-release-v8-thumb.txt18 # CHECK: stlex r2, r1, [r7] @ encoding: [0xc7,0xe8,0xe2,0x1f]
Dload-store-acquire-release-v8.txt17 # CHECK: stlex r2, r1, [r7] @ encoding: [0x91,0x2e,0x87,0xe1]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dload-store-acquire-release-v8-thumb.txt18 # CHECK: stlex r2, r1, [r7] @ encoding: [0xc7,0xe8,0xe2,0x1f]
Dload-store-acquire-release-v8.txt17 # CHECK: stlex r2, r1, [r7] @ encoding: [0x91,0x2e,0x87,0xe1]
/external/vixl/src/aarch32/
Dassembler-aarch32.h3268 void stlex(Condition cond,
3272 void stlex(Register rd, Register rt, const MemOperand& operand) { in stlex() function
3273 stlex(al, rd, rt, operand); in stlex()
Ddisasm-aarch32.h1201 void stlex(Condition cond,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMInstrThumb2.td3395 "stlex", "\t$Rd, $Rt, $addr", "",
DARMInstrInfo.td5007 NoItinerary, "stlex", "\t$Rd, $Rt, $addr",
/external/llvm/lib/Target/ARM/
DARMInstrThumb2.td3413 "stlex", "\t$Rd, $Rt, $addr", "",
DARMInstrInfo.td4742 NoItinerary, "stlex", "\t$Rd, $Rt, $addr",
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/
DARMGenAsmMatcher.inc7760 "ub16\005ssub8\003stc\004stc2\005stc2l\004stcl\003stl\004stlb\005stlex\006"
8820 …{ 1313 /* stlex */, ARM::t2STLEX, Convert__Reg1_1__Reg1_2__MemNoOffset1_3__CondCode2_0, Feature_Is…
8821 …{ 1313 /* stlex */, ARM::STLEX, Convert__Reg1_1__Reg1_2__MemNoOffset1_3__CondCode2_0, Feature_IsAR…

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