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Searched refs:sunxi_mctl_ctl_reg (Results 1 – 15 of 15) sorted by relevance

/external/u-boot/arch/arm/mach-sunxi/
Ddram_sun8i_a33.c88 struct sunxi_mctl_ctl_reg * const mctl_ctl = in auto_set_timing_para()
89 (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; in auto_set_timing_para()
172 struct sunxi_mctl_ctl_reg * const mctl_ctl = in mctl_set_pir()
173 (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; in mctl_set_pir()
181 struct sunxi_mctl_ctl_reg * const mctl_ctl = in mctl_data_train_cfg()
182 (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; in mctl_data_train_cfg()
192 struct sunxi_mctl_ctl_reg * const mctl_ctl = in mctl_train_dram()
193 (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; in mctl_train_dram()
203 struct sunxi_mctl_ctl_reg * const mctl_ctl = in mctl_channel_init()
204 (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; in mctl_channel_init()
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Ddram_sun8i_a83t.c87 struct sunxi_mctl_ctl_reg * const mctl_ctl = in auto_set_timing_para()
88 (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; in auto_set_timing_para()
204 struct sunxi_mctl_ctl_reg * const mctl_ctl = in mctl_set_pir()
205 (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; in mctl_set_pir()
213 struct sunxi_mctl_ctl_reg * const mctl_ctl = in mctl_data_train_cfg()
214 (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; in mctl_data_train_cfg()
224 struct sunxi_mctl_ctl_reg * const mctl_ctl = in mctl_train_dram()
225 (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; in mctl_train_dram()
259 struct sunxi_mctl_ctl_reg * const mctl_ctl = in mctl_channel_init()
260 (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; in mctl_channel_init()
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Ddram_sunxi_dw.c20 struct sunxi_mctl_ctl_reg * const mctl_ctl = in mctl_phy_init()
21 (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; in mctl_phy_init()
29 struct sunxi_mctl_ctl_reg * const mctl_ctl = in mctl_set_bit_delays()
30 (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; in mctl_set_bit_delays()
269 struct sunxi_mctl_ctl_reg * const mctl_ctl = in mctl_h3_zq_calibration_quirk()
270 (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; in mctl_h3_zq_calibration_quirk()
368 struct sunxi_mctl_ctl_reg * const mctl_ctl = in mctl_sys_init()
369 (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; in mctl_sys_init()
423 struct sunxi_mctl_ctl_reg * const mctl_ctl = in mctl_channel_init()
424 (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; in mctl_channel_init()
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Ddram_sun9i.c185 struct sunxi_mctl_ctl_reg *mctl_ctl = in mctl_ctl_sched_init()
186 (struct sunxi_mctl_ctl_reg *)base; in mctl_ctl_sched_init()
357 struct sunxi_mctl_ctl_reg *mctl_ctl; in mctl_channel_init()
452 mctl_ctl = (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; in mctl_channel_init()
455 mctl_ctl = (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL1_BASE; in mctl_channel_init()
Ddram_sun6i.c106 struct sunxi_mctl_ctl_reg *mctl_ctl; in mctl_channel_init()
110 mctl_ctl = (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; in mctl_channel_init()
113 mctl_ctl = (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL1_BASE; in mctl_channel_init()
Ddram_sun8i_a23.c96 struct sunxi_mctl_ctl_reg * const mctl_ctl = in mctl_init()
97 (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; in mctl_init()
/external/u-boot/arch/arm/mach-sunxi/dram_timings/
Dlpddr3_stock.c7 struct sunxi_mctl_ctl_reg * const mctl_ctl = in mctl_set_timing_params()
8 (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; in mctl_set_timing_params()
Dddr2_v3s.c7 struct sunxi_mctl_ctl_reg * const mctl_ctl = in mctl_set_timing_params()
8 (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; in mctl_set_timing_params()
Dddr3_1333.c7 struct sunxi_mctl_ctl_reg * const mctl_ctl = in mctl_set_timing_params()
8 (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; in mctl_set_timing_params()
/external/u-boot/arch/arm/include/asm/arch-sunxi/
Ddram_sun8i_a33.h65 struct sunxi_mctl_ctl_reg { struct
Ddram_sunxi_dw.h81 struct sunxi_mctl_ctl_reg { struct
Ddram_sun8i_a83t.h65 struct sunxi_mctl_ctl_reg { struct
Ddram_sun9i.h40 struct sunxi_mctl_ctl_reg { struct
Ddram_sun8i_a23.h91 struct sunxi_mctl_ctl_reg { struct
Ddram_sun6i.h40 struct sunxi_mctl_ctl_reg { struct