Searched refs:sys_pll1_cfg0 (Results 1 – 2 of 2) sorted by relevance
98 pll_cfg0 = readl(&ana_pll->sys_pll1_cfg0); in decode_sscg_pll()615 pll_cfg0 = &ana_pll->sys_pll1_cfg0; in sscg_pll_init()707 setbits_le32(&ana_pll->sys_pll1_cfg0, SSCG_PLL_CLKE_MASK | in clock_init()
219 u32 sys_pll1_cfg0; member