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Searched refs:sys_pll1_cfg2 (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-imx/mx8m/
Dclock.c100 pll_cfg2 = readl(&ana_pll->sys_pll1_cfg2); in decode_sscg_pll()
617 pll_cfg2 = &ana_pll->sys_pll1_cfg2; in sscg_pll_init()
/external/u-boot/arch/arm/include/asm/arch-mx8m/
Dimx-regs.h221 u32 sys_pll1_cfg2; member