Searched refs:tclk (Results 1 – 8 of 8) sorted by relevance
15 unsigned int mv_ddr_cl_calc(unsigned int taa_min, unsigned int tclk) in mv_ddr_cl_calc() argument17 unsigned int cl = ceil_div(taa_min, tclk); in mv_ddr_cl_calc()23 unsigned int mv_ddr_cwl_calc(unsigned int tclk) in mv_ddr_cwl_calc() argument27 if (tclk >= 1250) in mv_ddr_cwl_calc()29 else if (tclk >= 1071) in mv_ddr_cwl_calc()31 else if (tclk >= 938) in mv_ddr_cwl_calc()33 else if (tclk >= 833) in mv_ddr_cwl_calc()47 unsigned int tclk; in mv_ddr_topology_map_update() local105 tclk = 1000000 / freq_val[tm->interface_params[0].memory_freq]; in mv_ddr_topology_map_update()107 val = mv_ddr_cwl_calc(tclk); in mv_ddr_topology_map_update()[all …]
25 unsigned int time_to_nclk(unsigned int t, unsigned int tclk) in time_to_nclk() argument28 return ((unsigned long)t * 1000 / tclk + 974) / 1000; in time_to_nclk()
122 unsigned int mv_ddr_cl_calc(unsigned int taa_min, unsigned int tclk);123 unsigned int mv_ddr_cwl_calc(unsigned int tclk);
17 unsigned int time_to_nclk(unsigned int t, unsigned int tclk);
1275 unsigned int tclk; in ddr3_tip_freq_set() local1321 tclk = 1000000 / freq_val[frequency]; in ddr3_tip_freq_set()1322 cl_value = mv_ddr_cl_calc(tm->timing_data[MV_DDR_TAA_MIN], tclk); in ddr3_tip_freq_set()1327 cwl_value = mv_ddr_cwl_calc(tclk); in ddr3_tip_freq_set()
34 u32 tclk; member
129 t->tclk = CONFIG_SYS_TCLK; in setup_board_tags()
936 u32 tclk; member