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Searched refs:timing_data (Results 1 – 8 of 8) sorted by relevance

/external/u-boot/drivers/ddr/marvell/a38x/
Dmv_ddr_spd.c58 int mv_ddr_spd_timing_calc(union mv_ddr_spd_data *spd_data, unsigned int timing_data[]) in mv_ddr_spd_timing_calc() argument
67 timing_data[MV_DDR_TCK_AVG_MIN] = calc_val; in mv_ddr_spd_timing_calc()
74 timing_data[MV_DDR_TAA_MIN] = calc_val; in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
85 if (timing_data[MV_DDR_TWR_MIN] == 0) in mv_ddr_spd_timing_calc()
86 timing_data[MV_DDR_TWR_MIN] = 15000; in mv_ddr_spd_timing_calc()
93 timing_data[MV_DDR_TRCD_MIN] = calc_val; in mv_ddr_spd_timing_calc()
100 timing_data[MV_DDR_TRP_MIN] = calc_val; in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRC_MIN] = calc_val; in mv_ddr_spd_timing_calc()
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Dmv_ddr_topology.c64 if (mv_ddr_spd_timing_calc(&tm->spd_data, tm->timing_data) > 0) { in mv_ddr_topology_map_update()
116 val = mv_ddr_cl_calc(tm->timing_data[MV_DDR_TAA_MIN], tclk); in mv_ddr_topology_map_update()
Dddr_topology_def.h92 unsigned int timing_data[MV_DDR_TDATA_LAST]; member
Dmv_ddr_spd.h277 int mv_ddr_spd_timing_calc(union mv_ddr_spd_data *spd_data, unsigned int timing_data[]);
Dddr3_training.c1322 cl_value = mv_ddr_cl_calc(tm->timing_data[MV_DDR_TAA_MIN], tclk); in ddr3_tip_freq_set()
/external/u-boot/arch/arm/mach-exynos/
Dclock_init.h85 unsigned timing_data; member
Ddmc_init_ddr3.c129 writel(mem->timing_data, &dmc->timingdata); in ddr3_mem_ctrl_init()
611 writel(mem->timing_data, &drex0->timingdata0); in ddr3_mem_ctrl_init()
612 writel(mem->timing_data, &drex1->timingdata0); in ddr3_mem_ctrl_init()
Dclock_init_exynos5.c190 .timing_data = 0x3630580b,
293 .timing_data = 0x3630580b,
396 .timing_data = 0x3630580b,